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TPS65094: RSMRSTB assert condition

Longchang Chen
Intellectual 1350 points
Part Number: TPS65094

Hi :

   there are one chip in customer board, S0-S5-S0, then put PMICEN to low, we test Buck1 output , it is 0.2V, but now RSMRSTB still is high, what reason cause this?

another, does customer must set VID for Buck1? when customer need set VID for BUCK?

many thanks

  • 0
    TI__Genius 17380 points
    Hi Longchang,

    Can you post a scope shot with PMICEN high and RSMRSTB low and BUCK1 output voltage? RSMRSTB comes from an AND gate that includes PMICEN as an input. As such, when PMICEN goes low, RSMRSTB must go low as well.

    I'm also a bit confused when you say S0-S5-S0, then PMICEN low. Is the system intentionally going from S0 state down to S5 state then back to S0 state and then emergency shutdown? Generally it goes S0-S5-G3 for a full shutdown where PMICEN goes low in the S5 to G3 transition.

    Regarding BUCK1, VNN, it defaults to 1V and then the APL processor can dynamically scale the voltage up and down to correspond with processor needs. BUCK2, VCCGI, defaults to 0V and does require processor to set the voltage upon boot.

    Which TPS65094x OTP are they using? If it's TPS650944, it also requires THERMTRIPB input to the PMIC to go low when PMICEN goes low to trigger a proper reset. Otherwise PMIC does do BUCK1 S-to-A rail transition and VNN stays in sleep state rather than reverting back to an A rail.