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TPS65217: Battery Powering and Power Path Control - Beagel Bone

Part Number: TPS65217

Hey Guys,

The problem of using a LiIon battery to allow BeageBone boards to orderly shutdown is object of several posts here.

In my particular case I just want to use the battery power to allow shutdown and disconnect the battery from the power path at the end of power down sequence to work around the problem of VSYS being kept with 4,1 V causing VDD_3V3A to set to around 0,8V.

As I don't intend to run on battery nor on USB, I came up with this solution and I would like to have your thoughts in why it didn't work ....

The whole idea is to connect the battery in the USB input of the PMIC (instead of BAT terminal) allowing battery power to be connected/disconnected using power path control bit D4 in the Power Path Control Register (PPATH). With this I can change the shutdown routine of the OS to disconnect the battery power from VSYS just at the end of the power off cycle, before issuing the POWER_EN Signal.

As the battery still needs to be charged, my idea is to connect BAT SENSE to the battery (+) and connect BAT to BAT SENSE via a low Vf diode in order to prevent the battery from supplying the original power path. It should work because the charging cycle tests the battery presence sending a small current to it and sensing the voltage (via BAT SENSE I suppose). Naturally TS is supposed to be connect do a 10K resistor to ground.

However, it didn't work! PMIC just didn't turn on when AC input is connect to a suitable 5V power supply.

Below is the circuit:

Does someone can explain why it doesn't work?

Best regards

 

 

  • Hi Angelo, thank you for the post. I have assigned the engineer supporting this device to respond. Best Regards, Scott
  • Thank you. Anxiously waiting ...
  • Angelo,

    Thanks for posting your question! I support the TPS65217 and will try to help resolve you issue.

    I do not think the schematic will work as you have drawn it. When a battery is detecting as having a good voltage, the TPS65217 will always want to use BAT power, but the diode blocks it completely from drawing current!

    Give me a little time to try to think of a workaround that meets your requirements.
  • Thank you for the reply. What I want is the ability to turn battery power off just before PMIC is turned off by the processor. The system will be live again only when AC power is good. Regards.
  • I'm not 100% sure what you mean by "turn battery power off just before PMIC is turned off by the processor."

     


    When the Linux kernel of the AM335x is used, the PMIC driver handles all of the system power states. 

    The battery does not need to be physically cut off from the system in order for the PMIC to enter the "OFF" state.

    Once the processor determines it wants to shut down the system, the battery will simply sit there with no load on it (BAT is connected to SYS but all of the DC-DC & LDOs rails are shut down).

    A rising edge on AC will trigger another power-on event, and the PB_IN push-button will be the only way to wake up the system on Battery power. If the push-button is difficult to access, then the battery is effectively cut out of the system.

  • Brian, if battery is present, VSYS never goes to zero and die to a hw bug in the beaglebone green board VDD3V3A doesnt go to zero, but for something close to 1V causing VDD3V3B to remain active, stressing the processor.

    Moreover, if AC input goes down for a few seconds the system will shutdown and (in my case) will wake up again only when AC is cycled again (the board is supposed to be unassisted).

    We solved the problem changing the Linux kernel to treat PMIC interruptions in a different way, but, If PMIC had an extra mosfet to switch the battery off the power path under I2C control would be a great feature.

    Best regards
  • Angelo,

    Yes, I think it would be a good option to be able to disable the connection from BAT to SYS when the TPS65217 is OFF.


    On the other hand, I do not understand why VDD_3V3A would be non-zero at this time. All TPS65217 power rails downstream from SYS should sequence-down when SYS is no longer a valid voltage. When I have tested this scenario, I probe LDO1 and verify it is low even when SYS is not fully down to GND. If LDO1 is 0V, all other rails (including LDO4, or VDD_3V3A) should have been pulled to GND before that.

    If VDD_3V3A is low, then then the ENable pin that controls VDD_3V3B should also be low.

    Of course, I am using the Beagle Bone Black as a reference, and you mentioned the Beagle Bone Green. Is the wiring of VDD_3V3A different on the Beagle Bone Green PCB?