• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 62 subscribers
  • Views 956 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS659039-Q1: DRA742 CPU sometime can't power on with TPS659039-Q1

Ben Tseng
Intellectual 320 points
Part Number: TPS659039-Q1

Hi

I followed the VAYU EVM to develop our customer board.

I use RESET_IN of PMIC to control power ON/OFF event.

Other control signals are floating include PWRON, RPWRON, PWRDOWN as VAYU EVM.

The VDDA_RTC of PMIC is only 1.1V when CPU can't power on.

I have checked the 3.3V, 5V is OK and RESET_IN release after 3.3V, 5V power up around 5mS.

The power on fail is not always that the fail rate about 1/3.

Are any signals must to check with power on fail?

thank you.

  • 0
    TI__Genius 16030 points
    Hi Ben,

    By VDDA_RTC, do you mean LDOVRTC_OUT? VRTC should be 1.8V, so if this is 1.1V, then this is the most likely cause of the issue. While the PMIC is OFF, LDOVRTC can support up to 500uA, so please check if you have any extra load on this rail (like pull-ups).
    You should also double check you have the recommended 2.2uF output capacitance on LDOVRTC_OUT.

    You do also need GPIO_7/POWERHOLD pulled high to turn on the PMIC. Do you have this connected to a logic high signal?

    Regards,
    Karl
  • 0 in reply to Karl Wallinger
    Intellectual 320 points

    Hi Karl,

    Yes, it is LDOVRTC_OUT. I connect it to VDDA_RTC of CPU(Jacinto6).

    It can be power on the CPU when I disconnect LDOVRTC_OUT of PMIC  to VDDA_RTC of CPU,

    but VDDA_RTC is necessary for the CPU with RTC mode.

    For GPIO_7/POWERHOLD, I pulled high it to 3.3V.

    Is it mater the RTC_PORZ of CPU because RTC_PORZ has a glitch when LDOVRTC(VDDA_RTC) arise.

    Note: I connect the to PMIC_REGEN_DDR of PMIC to RTC_PORZ of CPU.

  • 0 in reply to Ben Tseng
    TI__Genius 16030 points
    Hello Ben,

    I think the RTC_PORz pulse could be causing this issue, if it is pulling some current while LDOVRTC is still ramping up. Do you have VIO_IN tied to VCC1? Without seeing the schematic, I would suspect this to be the cause of the GPIO_6 glitch.

    Do you have any way to disconnect RTC_PORz from GPIO_6, and instead use another signal like RESET_OUT? If you can make this modification on one board and see the issue go away, I think this will prove that this glitch is causing the issue.

    Regards,
    Karl
  • 0 in reply to Karl Wallinger
    Intellectual 320 points
    Hi Karl,

    Thank you for your comments.
    I have placed pull down 3.3k resistor on GPIO6 then issue is go away.