In a design using the TPS65917-Q1, we have found on some boards that after a shutdown, if the voltage applied to ADC IN2 on the TPS65917-Q1 exceeds 800mV, a latched condition occurs where we have problems with power down/up.
ADC IN2 is set up in hardware to read a voltage that can be present when the PMIC is down, but the software is not yet reading this ADC.
This only occurs on some boards. On the ones where it does occur,, the effect is dependent upon the voltage applied to ADC IN2 being above 800mV and this appears to be a precise threshold. On boards where this does not occur, the unit consistently functions normally whether the voltage at ADC IN2 is above this threshold or not.
Does applying above 800mV to ADC IN2 on the TPS65917-Q1 cause a known problem? Is there a specific area of the PCB design that I should look for manufacturing errors? Our software is not yet using the ADC IN2. Is it possible that using this ADC in software could solve this problem?