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TPS65381-Q1: Diagnostic check at the SDO digital-output

Helge Pape
Prodigy 160 points
Part Number: TPS65381-Q1
Other Parts Discussed in Thread: TPS65381A-Q1

Hello,

in section 5.4.9.2 of the TPS65381 data sheet there is the following outlined:

"A diagnostic check at the SDO digital-output pin is also possible in DMUX mode. For this diagnostic
check, the following sequence is required:
1. The MUX_CFG[1:0] configuration must be set to 01b for DIGITAL MUX mode.
2. The SPI NCS must be kept HIGH.
3. The state of the SDO pin is controlled by the SPI_SDO bit (bit D6 in the DIAG_CFG_CTRL register).
During this SDO check at the SDO pin, the DIAG_OUT pin is kept low if no signal from the Digital MUX
Selection table is selected."

To perform an interconnect test i did the following:

  1. Set DIAG_CFG_CTRL to 0x01 (Digital Mux mode)
  2. Save SPI5 configuration
  3. Configure SPI5 as GIO
  4. Configure SPI5 as input - only CS[0] as output
  5. Set CS[0] HIGH
  6. Read SPI5SOMI[0] - should be LOW (due to DIAG_CFG_CTRL Bit6 "SPI_SDO" = 0 --> see 1.) --> but it is HIGH
  7. Restore SPI5
  8. Set SPI_SDO bit (DIAG_CFG_CTRL Bit6)
  9. Configure SPI5 as GIO
  10. Configure SPI5 as input - only CS[0] as output
  11. Read SPI5SOMI[0] - should be HIGH (due to DIAG_CFG_CTRL Bit6 "SPI_SDO" = 1 --> see 8.) --> it is HIGH
  12. Restore SPI5
  13. Disable MUX config

Am I wrong to expect a LOW on SPI5SOMI in step 6?

Best regards,

Helge

  • 0
    TI__Prodigy 450 points
    Hi Helge,

    Your question is very specific, I will forward it to the product specialist for this part.

    Best Regards,
    Kevin
  • 0
    TI__Mastermind 20580 points

    Hello Helge,

    Thank you for bringing this to our attention. This is a gap in accuracy of the datasheet description of how to use the SPI SDO interconnect test.  I’m in the PMIC team and do not know the details of the software drivers you are referencing but I think using the DIAG_CFG_CTRL setting below should make this work for you.

    I have tried this using our EVM and GUI and believe the following flow should work in your software:

    Configure the DIAG_CFG_CTRL register with the following: 8b1Yx1 1101

      • MUX_EN (D7) = 1 (to enable the diagnostic MUX output)

      • SPI_SDO (D6) = Y, your choice for the interconnect test 0 for low and 1 for high on SDO

      • MUX_OUT (D5) = x (don’t care, not relevant while MUX_CFG[1:0] are not 2b00

      • INT_CON[2:0] = 3b111   {Datasheet is incorrect, this 111 is the setting needed for SPI_SDO bit to output on SDO pin}

      • MUX_CFG[1:0] = 2b01 for Digital MUX mode

    Changing SPI_SDO bit (0 or 1) should then be reflected on the SDO pin when NCS is HIGH, once NCS is low to send a SPI command to the TPS65381A-Q1 the SDO pin will be in SPI mode.

    Hopefully this helps.

    Please let us know if you have further questions.

    Best Regards,

    Scott

  • 0 in reply to Scott Monroe
    Prodigy 160 points

    Hello Scott,

    thank you for your fast reply. Your suggestion was very helpful, now I can manipulate SDO pin with expected results.

    Best Regards,

    Helge