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TPS65381A-Q1: How to detect failure in ENDRV

Part Number: TPS65381A-Q1

I would like to detec failure in ENDRV pullup or pulldown.

According to Page 62 in application note of TPS65381A-Q1, I checked to detect failure as bellow steps:

1. Set ENABLE_DRV bit to 1 via SPI by CPU.

2. ENDRV line is connected to GND by hand.

3. Read ENDRV_ERR bit via SPI by CPU.

After that, I could not find ENDRV_ERR bit is set.

Do I need some other steps to detect ENDRV failure?

Best Regards,

Shigeru Maeda

  • Hello Mr. Maeda,

    Did you check that ENDRV pin was high before you shorted it to GND by hand. There are many factors that will prevent ENDRV from being high in addition to the ENABLE_DRV bit. If for example the watchdog failure counter is not decremented to < 5 the ENDRV pin will not go high and thus shorting it would not be a mis-match and not set the ENDRV_ERR bit. Please see section 5.4.18 Enable and Reset Driver Circuit in the datasheet which has Figure 5-14 which shows the reset and enable circuit. The signal paths impacting ENDRV (enable circuit) are shown there.

    Hopefully this will help you determine if they ENDRV allowed to go high conditions were met and if you really forced a mis-match on the pin. Please let us know if you have follow up questions.

    Best Regards,
    Scott