This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS650830: design question for the TPS650830

Part Number: TPS650830

Hi, 

I have below question during design TPS650830: 

1. does TPS650830 have any limitation on the input voltage ripple? 

2. is the setting of power save mode and PWM mode in V1P2UCNT register? 

I am thinking to control the output of VR4 (for DDR power)

Thank you.

  • Hi, please see my comments below:
    1. I think the answer is: yes, the limitation on the input voltage ripple is: 5.4V<VIN+VRipple < 24V.
    2. Yes, Table 6-28 (V1P2UCNT Register Field Descriptions) in datasheet has detail description.

    Thanks!
    Phil
  • Hi Phil, 

    one more questioin:

    1. is there are specific limitation for the Vripple in your equation? I think it may be more important than the input range.

    Thanks for your explain.

  •   No, there is no specific limitation for the Vin_ripple; but it affects output ripple through its line regulation, which means higher input ripple gives higher output ripple with certain suppression by its line regulation. The detail data can be reached by searching "line regulation" in its datasheet. 

      Thanks!

      Phil

  • Hi Phil,

    The reason i am asking this is because now customer is having audible noise problem at VR4 from inductor.

    when the ripple is 600mV or greater at input side, it will have audible noise at light load operatioon.

    We wonder if you have suggestion for this rather than adjusting register to forced PWM mode or add more cap at input side.

    thank you.please let me know if you need further information.

  • Hi,

     Forcing it into PWM mode will cause lower efficiency when load is light;  adding cap at input side is better, since it also reduce the output ripple. The other cause I met before is the inductor mechanical quality; if so, replace it with a better one can fix the issue.

      Thanks!

     Phil

  • Hi Phil, 

    Thanks for your reply, it seems that the solution we have are: 

    1. change to forced PWM at light load.

    2. change the inductor which  have difference resonance frequency

    3. add capacitor at input side

    is this correct?

     Thank you.

  • Yes, but you can use one or two of them, not necessary all 3; and reverse the order you listed: 3 is the best solution, the 2 is good and 1 is not as good as 3, 2.
    Thanks!
    Phil