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TPS65070: Queries on TPS65070 PMIC Hardware design

Madhu Wesly
Intellectual 280 points
Part Number: TPS65070
Other Parts Discussed in Thread: OMAP-L138, TPS3805H33

Hi ,

Good day!

After a long exploration, I realized that the PMIC-TPS65070 is a better option for my application. I have few Queries on TPS65070 PMIC Hardware design, could you please clarify these:

1. Is it okay to keep TS pad UNCONNECTED if I do not use TS pin on TPS65070?

2. Are the ENDCDC1, ENDCDC2 pins controlled by Digital logic of High(3.3V) and Low(0V) by a micro-controller on my board?

3. Is it okay to keep DCDC3 related pads(L3, VDCDC3. DEFDCDC3, ENDCDC3) UNCONNECTED if I do not use DCDC3 output on TPS65070?

4. wLED, and Touchscreen interfaces are not being used, Is it okay to keep them UNCONNECTED?

5. Is it possible to control(ON & OFF) LDOs 1&2 through I2C interface as their Enable pins are not given out??

In the datasheet, it is not mentioned about unused pins. 

Thanks in advance.

  • 0
    TI__Expert 8810 points
    I have forwarded your question to Brian. He should respond shortly.
  • 0
    TI__Mastermind 30260 points

    What are you powering with the TPS65070? A processor? FPGA? I do not think you said what is being powered by the PMIC in your previous post: 

    Madhu Wesly said:
    1. Is it okay to keep TS pad UNCONNECTED if I do not use TS pin on TPS65070?

    No, TS pin cannot be left floating.

    From TPS65070 datasheet: "The default for the NTC is defined in register CHGCONFIG1 with Bit SENSOR TYPE as a 10k curve 2 NTC."

    If you do not want to measure temperature, you should use a normal 10k-Ohm resistor (instead of NTC resistor) so the PMIC thinks the temperature of the battery is always at an acceptable range.

    Madhu Wesly said:
    2. Are the ENDCDC1, ENDCDC2 pins controlled by Digital logic of High(3.3V) and Low(0V) by a micro-controller on my board?

    On the TPS65070, as seen in Figure 50. Powering OMAP-L138 on page 74 of the datasheet. it shows EN_DCDC2 and EN_DCDC3 are connected to GND because they are sequenced automatically and pin logic is ignored by the PMIC. Only EN_DCDC1 pin matters, and it can be controlled by the MCU GPIO. It can also be controlled in other ways. In Figure 50, it is controlled with the TPS3805H33 dual voltage detector.

    Madhu Wesly said:
    3. Is it okay to keep DCDC3 related pads(L3, VDCDC3. DEFDCDC3, ENDCDC3) UNCONNECTED if I do not use DCDC3 output on TPS65070?

    If DCDC3 is un-used, you should do the following: VIN_DCDC3 = connect to SYS, = L3 = Float, VDCDC3 = GND,  DEFDCDC3 = short to GND,  ENDCDC3 = short to GND.

    The datasheet says on page 34: Register PGOODMASK defines which of the power good Bits of the converters and LDOs are used to drive the external PGOOD signal low when the voltage is below the target value. Since the PGOODMASK value for TPS65070 is "08h: reset based on VDCDC2" then VDCDC3 can be connected to GND and will not impact PGOOD or Reset output.

    Madhu Wesly said:
    4. wLED, and Touchscreen interfaces are not being used, Is it okay to keep them UNCONNECTED?

    Touchscreen pins (AD_IN1-4) go into an ADC, so you should connect them all directly to GND.

    Madhu Wesly said:
    5. Is it possible to control(ON & OFF) LDOs 1&2 through I2C interface as their Enable pins are not given out??

    LDO1/2 are sequenced-on automatically by the PMIC, as shown is Figure 51. Sequence for OMAP-L138 on page 75 of TPS65070 datasheet.

    To disable the LDOs, you can write 00b via I2C to Bits [1..0] of CON_CTRL1. Register Address: 0Dh

    You can also re-Enable the LDOs after disabling them by I2C by writing a 1b to the respective LDO1/2 ENABLE bits, but you should know they will both turn on automatically during the power-on sequence.

  • 0 in reply to Brian Berner
    Intellectual 280 points

    Thanks for the reply Brian Berner.

    Q - What are you powering with the TPS65070? A processor? FPGA?

    Explanation: I am powering a Micro-controller along with few additional circuit blocks. No FPGA, No Processor.

    There are four blocks with different supply line each. One block among them is Micro-controller block which is connected with LDO1 of PMIC and this should always be ON.

    And the remaining three blocks are supplied from DCDC1, DCDC2 (DCDC3 is not using) and LDO2, and these converters should be controlled(ON & OFF) with the Microcontroller supplied from LDO1.

    Continuation to: 2. Are the ENDCDC1, ENDCDC2 pins controlled by Digital logic of High(3.3V) and Low(0V) by a micro-controller on my board?

                                    Query: Let it be ON/OFF when starting-up as per the power-up sequence. But, Will it be possible to control the DCDC1, DCDC2, and LDO2 converters using their respective ENABLE pins after the power-up sequence?? What would be the hardware schematics for achieving this? I am giving the Enable pins to micro-controller GPIOs to control them and following Application schematics as a reference. Enable topic is mentioned on Page 34 in the datasheet.

    Continuation to: 5. Is it possible to control(ON & OFF) LDOs 1&2 through I2C interface as their Enable pins are not given out??

                                    Query: Is it possible to control(ON & OFF) LDO 2 or 1 independently through I2C interface??


    Thanks in advance.

  • 0 in reply to Madhu Wesly
    TI__Mastermind 30260 points

    Madhu Wesly said:
    Will it be possible to control the DCDC1, DCDC2, and LDO2 converters using their respective ENABLE pins after the power-up sequence?

    No, it will not be possible. These pins are completely ignored in this variant of the device. All enabling/disabling after power-on must be done by the MCU via I2C.

    Madhu Wesly said:
    Is it possible to control(ON & OFF) LDO 2 or 1 independently through I2C interface?

    Yes, in my previous reply I said there are two bits for LDO1 and LDO2. Below is the truth table of these 2 bits:

    CON_CTRL1. Register Address: 0Dh Bits 1 and 0

    Bit 1 Bit 0
    LDO1 ENABLE LDO2 ENABLE Result
    0 0 Both LDOs Disabled
    0 1 LDO1 Disabled, LDO2 Enabled 
    1 0 LDO1 Enabled, LDO2 Disabled
    1 1 Default, both LDOs Enabled

    Controlling the DC-DC converters via I2C is a little more complicated, see Tables 6, 7, and 8 on page 54 of the datasheet for details.

    Simply put, the value of the DCDCx bit in CON_CTRL1 is ignored when the EN pin is low and the DCDC is disabled. For DCDC2 and DCDC3 in the TPS65070 device variant, the EN_DCDC2 and EN_DCDC3 is internally set to 1 at all times. This is how it is enabled by default and the pin state is ignored.

  • 0 in reply to Brian Berner
    Intellectual 280 points

    Thanks for the clarification Brian Berner.



    What is the purpose of THRESHOLD? Can I left it unconnected, what do I lose? Do I need these(THRESHOLD & RESET#) for making UVLO work? We can configure UVLO through I2C without depending on these two pins right. 

    Thanks in advance.

  • 0 in reply to Madhu Wesly
    TI__Mastermind 30260 points

    Madhu,

    Think of the THRESHOLD --> RESET# circuit as an independent block of the circuit. It is very useful to monitor any voltage >= 1V. If the voltage it monitors is >1V, a resistor divider would be needed to make the comparator trigger at the appropriate input voltage. 

    If you are considering using this feature, connect RESET# to the MCU and tie this net to the appropriate I/O voltage (1.8V or 3.3V) with a pull-up resistor. 

    You could monitor the input voltage to the entire system (VSYS = 5V, for example) and divide it down so that the comparator trips when VSYS = 4.5V or you could monitor the output of one of the DCDCx converters and use the RESET# logic value as an indicator that this specific rail is above or below whatever threshold has meaning in your system.

    The internal connections are shown clearly in the Functional Block Diagram on page 24 of the datasheet:

    If THRESHOLD is un-used, it can be left floating (comparator inputs are Hi-Z).

    If RESET# is un-used, it should be connected directly to GND (open-drain output).