Hi all.
I am working on dm3730 with tps65930. The board has a USB OTG port using PHY on the PMIC. Now the problem is, when I enable the internal usb3v1 LDO in USB OTG driver drivers/usb/otg/twl4030-usb.c, the system stopped at "Starting kernel ...", but the UCLK pin of pmic outputs stable 60MHz clock. When I disable internal usb3v1 LDO in OTG driver(by commiting regulator_enable(twl->usb3v1);), system boots successfully, but UCLK has no clock output. Anyone can help me? Thanks in advence.
I hope you have got this working. In case you still have problems then let me know. This peripheral is known to work and many customers have used this with no problems.
UCLK and LDO settings do not have anything in common that will cause the behavior you are seeing. I would recommend checking the software.
Regards,Gandhar------------------------------------------------------------------------------------------------------Kindly click the Verify Answer button on this post, if it answers your question.------------------------------------------------------------------------------------------------------
Hi Gandhar,Sorry to tell you that I still have this problem. I noticed that the DEV_GRP register of usb3v1 is different than the other twos after regulator_enable():VUSB3V1_DEV_GRP: 40 VUSB1V8_DEV_GRP: 46 VUSB1V5_DEV_GRP: 46 I don't know the exact meaning of STATE bitfield of DEV_GRP registers. Can you get something?Thanks.
40 and 46 are decimal.
The 3.1V is active at start-up and is in sleep state. The other two are OFF and software has the enable these. Please make sure that all USB LDOs are active prior to using the USB interface.