Hi
I'm designing power block for the DM8168 processor
There is a document whicn describes how to do it : TPS659112 Netra User Guide
and have a few questions:
why do I need additional DCDC to supply CVDDC? Cannot I use VDD1 of the PMIC? It is left unconnected.
The same concerns 0.9-V USB - cannot I supply it from one of the LDOs?
I'd like to simplify the supply as much as possible since I have very little space on board.
Ideal situation would be to use only the TPS659112 and some IC to supply DDR3 VTT , why not to use VDD2 to produce 1.5V for DDR3 and VIO to produce 3.3 for rest of the peripherals?
I assume that such choice was justified by power sequencing limitations, please confirm.
Regards,
Greg