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TPS65910 Power-up sequence selection timing

When is EEPROM boot mode determined with BOOT pins?

NO SUPPLY-to-OFF or BACKUP-to-OFF transition is caused by VCC7 reaching VMBHI threshold. Is EEPROM boot mode determined with BOOT pins when VCC7 reached VMBHI threshold?

I am concerned that the BOOT pin is incorrectly determined as 0 when VRTC is used to pull a BOOT pin to high level.

Best regards,

Daisuke

 

  • Boot mode is determined during the power-on event. The high-level input on the BOOT pins are 0.65*VRTC, and VRTC will be active before any viable power-on event.

  • Hi Richard,

    Thank you for your reply.

    Is the boot mode really determined during the power-on event?

    I ask a more determinate question. When is VRTC power mode in OFF state determined?

    If the power-on event means OFF-to-ACTIVE transition, the VRTC power mode in OFF state depending on the EEPROM bit (VRTC_REG.VRTC_OFFMASK) cannot be determined, so it should be determined during NO SUPPLY-to-OFF transition.

    Best regards,

    Daisuke