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LM5050-1: Block Diagram explanation

Part Number: LM5050-1

Please help me understand below portion of circuit:



  • Hi Shiv,

    My apologies for this question slipping through the cracks amongst our team. We strive for a 24 hour response time and we hope that this isolated case does not prevent you from using E2E again.

    I understand the block diagram for the LM5050 can be confusing at first.

    What you are looking at is a differential amplifier with 35uA current biasing. Since the base of one BJT is connected to the IN pin minus 30mV and the other is connected to the OUT pin, this means it is setting the GATE to pull down if the voltage difference between these pins is less than 30mV.

    Note that the block diagram is a little off, that 30mV corresponds to the spec for the forward regulation threshold which is 22mV (typical) with a 12V input. Similarly, the 30mV shown near the reverse comparator block is also off - it should be 28mV (typical).

    However the basic functionality of the LM5050 may be simplified to the following three statements:

    If IN – OUT > 22mV, increase GATE voltage
    If IN – OUT < 22mV, decrease GATE voltage
    If IN – OUT < -28mV, pull GATE to IN with strong pull down.



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