TPS2373: inquiry about MPS of the TPS2373-4

Hi Charles,

1. 26% is automatically generated when a Type 1 or 2 PSE is detected. The PSE generates the class fingers by sending 18V to the PD. Each time, the PD responds with its requested power by sending 2.5V through its selected class resistor (CLSA or CLSB) back to the PSE. The number of class events sent to the PD tells the PD what type the PSE is.

When the PSE sends a single class event (18V) & the PD responds with a 1,2, or 3 class pulse, then the PSE knows to provide type 1 power & no other class events are needed.

If the PD responds with a class 4 pulse after the first class event, the PSE will send a 2nd class event to tell the PD that it can supply type 2 power & the PD responds with its class current pulse to confirm.

2. AMPS_CTL resistor controls the current amplitude, not the duty cycle. To control the duty cycle, do as shown in the middle column.

Rmps is the resistor between AMPS_CTL & VSS. Imps is the current sent through Rmps & back to the PSE when AMPS_CTL = 24V. Irtn<20mA means there is no load.

For the AMPS_CTL calculation: The denominator should not be multiplied by the duty cycle. Thanks for catching that :)

3. Let me get back to you.

4. 26% will automatically be generated when type 1 or 2 PSE is present. The other duty cycles for type 3 or 4 will depend on how the PSE is configured.

Best,
Tom

3. The Cbulk Diode is between the bulk cap & RTN with the cathode facing towards the input. A "PSE Voltage step down event" is just a catch all term for a sudden reduction of voltage (in this case, greater than -0.4V).

For more info on the "PSE voltage step down event", see section 8.4.6.2 in the datasheet for TPS23753: www.ti.com/.../tps23753a.pdf

- Tom

Hi Charles,

You need to specify the the MPS functions. AMPS_CTL & MPS_DUTY need to be selected by the designer.
Leaving AMPS_CTL open will disable auto MPS.
Leaving MPS_DUTY will select 5.4% duty cycle.

Best,
Tom

Hi Charles,

1. For choosing the Rmps value, you take the same considerations you would with a .bt system: How little current is drawn when the load is detached? This depends on the system. When you find that current level, you know you need to have an Auto MPS current pulse big enough to exceed it.

2. The bulk cap is a required part of the power converter. The issue is that the auto mps pulses can eat into the charge on the capacitor. The blocking diode is there to prevent this leakage current.

3. Any of those MPS duty cycles will work with any PSE (that is compliant with the .bt standard). The real concern is that the appropriate duty cycle is selected according to table 5.

Hi Charles,

1. The TPS2373 will know what PSE it is connected to. If a type 1 or 2 PSE is connected, the PD will automatically output 26% regardless of how MPS_DUTY pin is configured. If a type 3 or 4 PSE is connected, the PD will know and check how MPS_DUTY is configured and will output the associated duty cycle.

2. Cbulk diode and its location is described below. Like it states, it's typically seen in UPOE or dual PoE applications however, if you do not want the bulk cap to effect the MPS duty cycle because lower duty cycle (low standby power consumption) is important, then you can add a diode as described below. The bulk cap can take away at the auto MPS pulses that goes to the PSE to maintain power. This means that at lower duty cycles it's possible for the PSE to remove power unless the table is followed. Adding the diode blocks any current from flowing through the cap so lower duty cycles are possible.

Note the diode helps prevent cbulk affecting the auto MPS duty cycle. Unrelated, in general if you go too high of bulk cap, the longer a PD will be in inrush during startup. This can cause the PD to heat up and possibly reach thermal protection. This is described in the many E2E posts and can be searched. I have not seen an application yet that needed a bulk cap larger than 300uF.

If you open MPS_Duty pin, the duty cycle will be 5.4% and not any more.

3. The Cbulk blocking diode can be either between VDD of the (diode anode) and the positive of the bulk electrolytic cap (diode cathode). Or between RTN (diode cathode) and negative of the bulk electrolytic cap (diode anode). This is also shown in Tom Amlee's picture in the previous post. It's not often that these diodes are here. Typically you will see them in forced UPOE applications or dual PoE applications.

The 'PSE voltage step-down event' is as suggested by the footnote a very rare occurrence where a PSE switch's power supply can droop (step-down) during a switchover event. In which case, a lower duty cycle may cause a skip in MPS pulse. The note and the table was added to ensure that for lower duty cycles (to save on standby power) the PD system should be known by the designer. And for larger bulk caps with lower duty cycles, the PSE system should understood. Otherwise, it's highly recommended to use the 12.5% duty cycle to ensure all bases are covered.

4. As described in #1. Automatic MPS is automatic and will adjust accordingly depending on what type PSE is connected to the PD.

If you're customer wants to support all types of PSE, I recommend sticking to the 12.5% duty cycle and keep the bulk cap less than 120uF.

Regards,
Darwin