What are the factors which affects turn off/on time of mosfets.In datasheets total gate charge is mentioned or curve showing Vgs vs Qg, I calulate time by Ig= Qg/T. I know gate charge by curve showing at particular Vgs. Current I know which I can provide via pin. By this I calculate time. Is this right method to calculate time. What are affects of input and output capacitance,reverse transfer cap on this. How do they affect the circuit. I an using DC regulated power supply for operation. Factors like turn on delay time,rise time,delay time, fall time. Are they minimum time required for operation.I have 10V dc source to be applied on Vgs of n channel mosfet & want to operate in 1ms. By curve I can find Qg=25nC at vgs =10V. Now current required to be supplied at gate terminal is Ig= 25nC/1ms. Is this method right?
I want to understand parameters given in datasheet of mosfets. where i can find their discription.
The turn on and turn off delays are usually mosfet related, but the functions also of the driving current.
The gate cahrge is fairly non-linear, and in hard-swithcing applications Miller-plateau must be always considered so it is a main factor. The higher the dU/dt at the MOSFET's DS, the longer will the miller-platueau will be, so the gate charge will seem higher. At zero-switching the Miller-plateau dissapears, so gate charge to turn on is greatly reduced.
An 1ms switching, or as your words, rise time at the mosfet gate should not be done, because the Integral part of the U*I at MOSFET DS will cause a very high dissipation. MOSFET GS driving pulses should be optimized for lots of paramteres, mainly application specific. For example: in a hard-swithced half-bridge like a Class-D amplifier, antiparralel-diode turn ons, DS votlages and output currents should be taken in consideration.
Wow!!!!!!!!!!!! Can u xplain it in simpler way. There might be some mathematical formula to calculate turn on time with some current, similarly turn off time , gate capacitance (these 3 I think r vry important in gate driving).
Under ZVS conditions the effective gate charge is: Qzvs=Vgate*(Qgate-Qgs-Qgd)/(Vgate-Vgs_turnon) where Qs are in datasheets, Vgate is the applied gate driving votlage, and the Vgs_turnon is the Gate-Sourve turnon treshold voltage. Turn on time will be tturon=t_on_delay+Qzvs/I_driving, where t_on_delay is in datasheets, and I_driving is the gate driving current. Gate driving current usually depends on the driver's capability, the sereies gate resistance and internal gate resistance.
Under hard-switching conditions the total Gate charge in datasheet should be taken in consideration. The calculation of turn-on time is otherwise the same, as gate drivign current. But take in consideration the mille-plateau effect. Normally the gate dirver has a rise up in driving current, but most of the current is needed at miller-plateau, so drivers rise up and fall time can be neglected.
results of gate charge from formula given by you above & looking at Vgs vs Qg are very different. Which one's 2 follow.
Gate capaciatnce is C = Qg/Vgs. Where Qg is caluclated by looking at graph vgs/Qg & Vgs is applied gate to source voltage
Or gate capacitance is sum of Cgs+Cgd. By both methods I am getting two different results.
In short can give some links or notes on web where I can understand these parameters & apply to caluclate values.
MOSFET's Gate is not an ideal capacitance. This is cleary shown on Qgs versus Vgs graphs, you can clearly see the Miller-plateau.
Here you can read a lot about these:
I am driving mosfet gate from push pull opamp output which gives VGS=10V with Rg=1M i.e Ig=10uAdc & total gate charge requied is 9.8nC & for turning off opamp I get VGS=0V with Rgs=1M.
How does to calculate rise & fall time.
For rise time Tr=Qg/Ig.
How does this 1M resistance affects the ciruit.
1M gate resistance ??? OMGWhy do you want to turn on and off that FET so slow?
This way that 1M resistance will affect the turn timse only, so turn currnet will be 10uA, gibinv 1s turn on and off times, extremely slow!
What are you doing with this FET exactly, what do you want to build? Do you know at all what you doing?
Hi Laszlo Lorantfy
1) From Vgs vs Qg graph I have noted total gate charge Qg. Which in my case is 22nC.
2) Now according to formula Ig= Qg/Ttransition.
3) In my application Ttransition of 3-10ms is sufficient.
4) So by equation Ig= 22nc/5ms = 4.4uAdc.
5) I have 10Vdc source from opamp. So I connected 1M resistance in between to supply sufficient of 10uAdc to turn on device.
6) Now to shut mosfet off, I read to pull off charge from gate capacitance. For that I can drive my gate to zero volts. I don't know how to calculate time for pulling off charge in this case. Please tell me how to calculate it.
7) If it takes large time to pull off charge from mosfet to turn off due to large resistance, I think open drain opamp could be a solution. Because when I have to turn on mosfet, I will connect via 1M resistance to 10Vdc supply. & to turn off fet It will connect Vgs=0V by providing ground through internal open drain fet of opamp & having advantage of not having large 1M resistance in between which will increase the charge pull off time.
8) If I use a push pull opamp, which can go between rails i.e 10V or 0V. But in this case 1M resistance will come in path while charging gate cap or pulling off charge. Which could better solution?
What is your application? In what application 3-10 ms transition times are sufficient? It must be something special.
Usually transition times are made as fast as possible (without making other related switching losses too high)
Just making a switch between current path. When current has to be stopped turn off fet otherwise keep fet on.
Do my calculations are right? Which opamp is useful- open drain or push pull.
How to calculate charge pull time with 1M resistance in between
Any help regarding this?
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