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Designing DC Electronic load

Other Parts Discussed in Thread: LM7171, CSD, CSD18542KCS, TIPD102, CSD16556Q5B

Hi,

I am designing a programmable dc electronic load circuit, with rating 0.9-3.3V and 0-30A current sink capability. I have referred to many circuits online which showed me simple op-amp with its output given to the gate of power mosfet.

Working of this circuit is as: say 100mV is given at the positive terminal of the opamp, the circuit working totally fine in simulation to give me 100/5=20A sinking through the mosfet. Opamp used: LM7171, Mosfet Used: CSD 18542KCS from TI.

I have made a board, and my circuit, though working absolutely fine in simulation, not working on board.

Following are the observations that I made:

a) output of the opamp should get modified depending on the voltage at the non inverting terminal of LM7171, however, its constantly giving 10V at the output even if voltage at non inverting terminal is 0. So, I believe feedback not working.

b) CSD18542KCS is expected to give nearly more than 100A when subjected to Vgs=10V, and Vds=0.1V, but its giving only 2A.

c) Even when  there is more positive voltage at inverting terminal than nono inverting, output doesn't go negative.

Any suggestions would be welcome. 

Thanks in advance.

  • Salil,
    In the MOSFET forum, I can only speak to your second question. The CSD18542KCS should behave according to Figure 2 in the datasheet. That is to say, at Vgs =10V, Vds =.1V, you should be seeing about 30A, which matches the 3.3mOhm resistance of the part as well. If you are not, you should check your Vgs and Vds waveforms.
  • Hi Brett,

    Thanks for replying.

    With Vgs=10V and Vds=0.196V to be precise, I am getting only 2A, while the source is set to give maximum 5A.

    Also, I want to find whether TI has an N channel power mosfet with following requirements:

    a) Good safe operating area i.e. Mosfet should be capable of withstanding atleast Vds=5V while current carrying capability of min 50A, at DC.

    b) low Rds on. The maximum Rds on that my application permits is not more than 10mohm. 

    c) less Qg in the range 0-20 nC, to permit high slew rate of current.

    d) Most important, exhibiting output characteristics like i have demonstrated below.

    Because the application requires the mosfet to operate in saturation region for these range of voltages.

    Look forward to hear back from you.

    Thanks,

    Salil

  • Salil,
    Something seems off. How are you measuring the drain to source voltage across the MOSFET.

    Or another question might be what is the voltage drop across the resistor at this point?

    As for whether we have a FET that meets your other requirements, that depends. I will say that all of our FETs are very good in the saturation region, but how much power they can handle is directly proportional to their die size.

    What voltage level do you require? And do you have a package preference? We have some excellent 100V FETs in D2PAK, or 30-100V devices in a range of other packages (SON5x6, 3x3, etc...). 250W is more power than any FET can actually handle continuously, but sometimes the DC line of the SOA actually refers to long pulses (@ or <100ms) which is what I assume you are referring to. How long do you actually anticipate the FET will need to handle this amount of power?
  • Hi Brett,

    So the application of MOSFET here is to sink current upto 40A. So, I am looking at DC line in SOA. The voltage that I expect across the FET while sinking 40A is maximum 4V and as less as 0.9V.

    I do not have package preference as such. 

    When I looked into the datasheet for the above MOSFET, I could see that the FET is in ohmic region for this voltage range. Maybe, I misinterpreted. 

    In that case, plz help me regarding the saturation characteristics. And again, the application requires a FET to operate in saturation region from 0.9V onwards, where, I expect the current through the FET not to get affected by Vds, and only by Vgs.

    Look forward to hear back from you.

  • Salil,
    Most of our parts will be in the Ohmic region up to and beyond 0.9V. It is not clear to me why you need the part to saturate before then.

    Can you specify the voltage you need and I can take a closer look?
  • Hi Brett,

    Okay let me explain you my application. I had already posted the circuit of my application right. So I want to use op-amp as an error amplifier, voltage at whose non inverting terminal would decide the voltage at inverting terminal. This inverting terminal is connected to a sense resistor 5 mohm, and to the source of mosfet.

    Application requires designing of programmable constant current load. FET is required to sink nearly 30 A of current. The voltage of the regulators or batteries to be connected across this FET ranges from 0.9 V-3.3 V. So maximum voltage that the FET has to tolerate is 3.3 V.

    So, with negative feedback to the op-amp, FET is behaving as a variable resistor. 

    Now suppose, we change the voltage of the source to 2 V from 0.9 V, so what basically we are doing is increasing Vds across mosfet. And in ohmic region, current would depend on Vds, which is not the requirement. I want my device to sink constant current even if Voltage of the source is changed from 0.9-2 V. 

    I know that negative feedback would most probably help in this. But still, I just wish to ask is there any device (FET) that agrees with the SOA and the application requirements?

    I hope I was able to explain you well.

    If still you need some clarifications on this, please let me know.

    Its much like voltage to current converter like TIPD102.

    Look forward to hear back from you.

  • Salil,
    Ok sounds like you can get away with a 25V FET.

    I would try the CSD16556Q5B - that should saturate by the 0.9V, especially if the Vgs is not that high on the FET.

    It is also excellent in the saturation region