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CSD18536KCS high current low voltage limitations?

Other Parts Discussed in Thread: CSD18536KCS

Hi Team,

I am working on a low side NFET driver that needs to handle a continuous current of 50A. I am thinking of using the CSD18536KCS due to its high current capability but I have a question about Vds.

Currently If I use the CSD18536KCS as a low side NFET driver the voltage drop across will be related to its Rds on (1.25-2 mOhms) x Ids (50A) which will be 100mV. My issue is that this value on the SOA curve lands above the grey line which is the Rdson limit line as you can see in the graph below. I marked this by a RED dot.

My questions are:

1. If I feed the FETs 50A what would Vds become? I have a feeling it might turn to the blue dot but I am not sure.

2. If I use 2 FETs in parallel would I get the result of the green dot because the new current is 25A?

3. What do you guys recommend in terms of a FET that can handle 50A continuously?

  • Marco, your calculation for Vds is correct. Only thing you didn't take into account is that the FET will likely heat up a bit.

    The Rdson line on the datasheet is calculated from a worst case scenario of max resistance x the temperature coefficient at the max temperature of the device (in this case 175 deg) provided in Figure 8 of the datasheet.

    Do not think about the Rdson line as something that you can violate. It is just a physical limitation that dictates what drain to source voltage you need to provide a certain current. If you source 50A from the FET, the Vds will adjust up and down the Rdson line, wherever that real line might be for the given FETs resistance at the operating temperature, until the right drain to source bias is acheived.

    Generally, the SOA is of more interest for devices operating in the "saturation region" - so the colored lines.

    The more important thing to look at is how much power do you plan on dissipating in the FET. At 1.3mOhm typ (assuming 10Vgs), lets be conservative and say 125deg operation, you'll see a resistance of around 1.3 *1.55 = ~2mOhm typical.

    P = I^2*R so 50*50*2E-3 so ~5W. This is not unheard of for a TO-220, so long as you properly heat sink the device. All this is assuming the device will be operated DC. If you are switching, you have to factor in those losses as well.

    The last comment I will make is that this device is the lowest resistance 60V TO-220 in the world. So if 5W of power dissipation is too much for your design, you will need to consider either paralleling multiple FETs or looking at different packages.