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CSD17310Q5A: Junction temperature issue.

Part Number: CSD17310Q5A
Other Parts Discussed in Thread: CSD17577Q5A

Hi sir:

we are measuring CSD17310Q5A in the component derating test..
There is a formula “0.75(Tjmax - 25°C) + 30°C” for junction temperature margin.
Could you help me to explain this formula ?

  • Jerry,

    I am not familiar with this formula, this is not a std FET de-rating formula I am aware of .

    May I suggest you use the following formula to estimate the junction temperature: TJ = TA + ( R θJA × Power Dissipation )
    Then you can put whatever margin you desire in.
    For an SON5x6 SMD part this is normally dictated by the pcb max allowable temperature of say 105degC. Thermal resistance Rthjc is 1.9degC/W, typically 3W is about the max power you want to dissipate on a pcb for this SON5x6, so difference from pcb to junction temp would only be about 6degC. This part has a a max of 150degC so there would be plenty of margin.

    The actual junction temp will need to be calculated taking into account the Rthja of the pcb, assuming a multilayer pcb may be 15degC/W, plus the 1.9degC/W for the FET totals ~17degC/W. 3 Watts of power dissipation would give about 51degC rise with no external cooling. In this case the FET will be fine up to an ambient of 99degC as the max junction is 150degC. Then you can add whatever margin you need to determine max ambient.

    I hope this helps

    Chris....
  • Jerry,

    One other point to note, the CSD17310Q5A is an older device, may I suggest you also look at the CSD17577Q5A, this is a more cost effective device.

    Chris...