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CSD75208W1015: Gate Clump Current

Part Number: CSD75208W1015

Hello.

I'm not sure what the "Gate Clump Current" refers to.

I'm designing a board where real-estate is very limited. I'd like to use CSD75208W1015 as a high-side FET.

The rail is about 8V which is higher than the maximum Vgs (-6V). I'd like to pull down the gate to Ground through a resistor but not to use  a zener or resistor voltage divider to save space.

Assuming I use a, e.g. 1K, resistor for pull down, would the gate clamp limit diode the voltage to acceptable levels? since 8[mA] is much less than the allowed -0.5[A].

Is that what the term means? I saw no charts detailing the Vgs vs. current and I'd hate to find out the hard way.

  • Gilad,

    Thank you for posting.
    The max power dissipation this gate clamp can handle is 0.35W, this is where the 0.5A limit comes from. (Forward biased diode voltage of 0.7V * 0.5A = 0.35W)
    As you are limiting the current to 8mA, you would limit the power to 64mW (8v*8mA), which is below the max and as such you should be fine.
  • Hi Chris.
    I wasn't planning on using the diode in forward voltage. The Gate goes _below_ the Source enabling current to flow from Source to Drain.
    I assumed the diode is a Zener (because of the drawing) and would clamp the voltage to the Zener voltage level.
    Under such conditions, would limiting the current with a resistor be enough?
    P.S. I don't want the body diode to conduct which is why I intend the current to flow from Source to Drain and not the other way around.
  • Gilad,

    As you are limiting the current to 8mA, you would limit the power to 64mW (8v*8mA), which is below the max 0.35W and as such you should be fine.
    The only reason I mentioned the forward biased diode was not that I expected the application to work this way but simply how we came up with a max current allowed.