Having a large ripple from DCR011205, loaded around 10-20mA. The ripple is some 100mVpp. The datasheet promises
much less than that. Used ceramic X7R capacitors on input/output/recitfier. Any ideas where to look to fix this?
I think if you just keep C10 and remove C11 you should be alright (C11 connects gnd to gnd )
Yeah C11 looked odd to me but that's why I put this up so I could get a 2nd pair of eyes on it!
I have couple questions,
We'll probably have to wait for Tom to chime in but wouldn't going from 1uF to 2.2uF just help to reduce the ripple? I think you need a certain minimum amount of capacitance and then any additional amount is a matter of cost vs. benefit.
Thanks for the schematic .C11 is not requried as it is connected to the same isolated ground as the ferrite bead FB3. The 2.2uFceramci capacitors can be used on the Vout bus for filtering .
1. I have questions on the TL750m12QKTTRQ1 regulator and 750MA load.
a. Is the DCR011205U a single stage stage converter or are there multiple stages with the same layout?
b. What is the average 12V current in this application?
I hope that you had a good weekend. That's good about not needing C11 as it wasn't making much sense to me.
The board draws only maybe ~150mA and most of that is on the isolated 5V rail for a meter. The input is an unregulated 12V supply so no load voltage is ~17V. The TL750m12QKTTRQ1 really shouldn't be designed in as a standard LDO would work fine but for some reason that's what this design started with. Not really a good excuse so maybe I should swap that out so I'm not asking that same question 6 months from now!
This design just needs a regulated 12V rail and then an isolated 5V rail for the meter. The application is for a MOSFET "tester" which uses a LM234 for a constant current source of 1mA on the 12V rail.
I attached your questions below regarding teh DCR010505U.
The responses are below the questions.
2. I am using a DCR010505 and I have some EMI issues on my isolated circuit side which clearly spreads a 400KHz harmonics through my power planes. I have not been using the PI filter configuration but I plan to give a shot to see if I can limit the EMI. I have found recently that I have been using low ESL caps around the DCR instead of low ESR . Is this a big mistake from a filtering point of view ? If so, I plan to use low ESR caps which have an ESR < 0.01 for the frequency range of 100-1000KHz and an impedance < 0.1ohm for the same frequency range.
2A.All ceramic capacitors are required on both input and output buses for the DCR series and DCP series . PI filter designed with 1-5uH ( ferrite beads 2773021447) and ceramic capacitors 2.2uF on the input bus attenuates the reflowed noise by 10-15db.
Would you be willing to take a quick look at my board layout? I think you might be able to make some valuable comments and it doesn't have much in teh design so I don't think it would take too much of your time. What would be the best way to provide you the files and in what format? I'm waivering right now with simple trace only layout vs. a few power pours.
George Ioakimedes :
I would like to look at your layout.
A pdf file would be best fro viewing.
My e-mail is
email has been sent to you!
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