We are using your buck converter TPS82085, and we encountered a problem while testing the UVLO threshold.
We are using the part with the following components:
Input Caps: ceramic 22uF + dielectric 10uF
Ouput Cap: 22uF
FB Resistors: 82.5K between VOUT and FB, 162K between FB and GND (which means VOUT should be 1.2V)
PG Resistor: 499K between VOUT and PG.
At first we used the device with said components, and we saw that while testing the UVLO falling edge threshold, we received a UVLO threshold of 1.9V which is under the minimum value of 2.1V.
After that happened, we tried to remove the ceramic input cap, and remained with the dielectric 10uF input cap, but the result remained the same.
We tried then to remove the dielectric input cap, and remained without any input caps, but the results still remained the same.
Then we also removed the output cap, and we receive a good result of 2.2V falling edge UVLO threshold. Unfotunately, the rising edge threshold was out of spec - a few mV above 2.5V which is the max. value according to the datasheet.
Afterwards we performed the same tests without any periphery components (no caps or resistors), and we tied the FB to VOUT directly. The falling edge threshold was within spec but the rising edge was out of spec. To solve this problem we added an input cap of ceramic 10uF and it solved the problem, but the output voltage was unstable.
Then we returned to the circuit with the periphery components mentioned above. We deducted from the said experiment that the problem is rooted in the output cap. We returned the output ceramic cap of 10uF. The result of the falling edge was good but the output voltage was followed the input voltage until the UVLO, in which the output voltage dropped.
Do you have any explanation for this behavior?
Thank you
Eli