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LMZ23605: Synchronization: Pulldown resistor, positive or negative pulse, filter?

Part Number: LMZ23605

Hello team,

my customer is looking for more information about the SYNC pin:

-  in the "typical application schematic", a resistor is shown, which connects the SYNC pin to ground. Is it necessary to use the resistor, when synchronisation is used, i.e. is there already a pull down resistor integrated? Is it required to use Rsnopt? In case no syncronisation is used, is it recommended to put the pin to ground?

- Is a filter required when the SNYC function is used, or is it possible to directly connect the signal to the pin?

- Is the SYNC pin triggered by a positive or negative pulse?

Thank you very much in advance and kind regards,

Felix

  • Hi Felix,

    If you don't plan on using the SYNC pin, you can connect the SYNC pin directly to GND. If you want to use the SYNC pin, you can directly drive the pin with a 3.3-V logic input without the need for a filter. Just make sure that there is a 1.5kOhm resistance between the SYNC pin to ground following the recommendation from Synchronization Input (section 7.3.1). The SYNC pin is triggered by a positive pulse since the typical input threshold is 1.4-V transition level.

    Regards,
    Jimmy
  • Hi Jimmy,

    I got the following reply from my customer:

    I tested the synchronization function, but I have the feeling that the device is synchronized on the falling edge of the square signal provided to the SYNC pin. In the feedback above I read “triggered by a positive pulse” but no clear if that means rising edge or not. According to my test it is not triggered by the rising edge. In fact, if I change the duty cycle of the synchronization signal, the rising edge of the switch node moves as well. If the device was synchronized by the rising edge, the switch node rising edge would not move according to the duty cycle of the synchronization signal. Therefore my assumption is that the device switching cycle is triggered by the falling edge of the synchronization signal applied to the SYNCH pin. Can you please confirm/correct that?

    Furthermore in case the device will be triggered by the falling edge of the synchronization signal, there will be surely a certain delay between the falling edge of the synchronization signal and the start of the new on-time cycle. Can we get this value (as typical value)?”

    Thank you and kind regards,
    Felix