Team,
One of the strategic defense companies had inquired about the nano modules.
He would like to use 100uF output capacitance but saw a comment in the datasheet that this can lead to a current limit.
Could you tell what need to be done in order to allow this output capacitance?
http://www.national.com/an/AN/AN-2167.pdf
thanks
Amit
Amit Benjamin, Analog & Power FAE Texas Instruments, Israel, Cell +972 54 6663791
Amit,
What is their reason to use 100uF of output cap?
I will forward to the apps engineer responsible, perhaps he has some advice.
Regards,
Allan
Hi,
I believe they are powering FPGA and 47uF is considered to be too marginal capacitance.
They afraid to have a marginal design.
What can issues might appear if using a higher capacitance? Stability issues?
Thanks
From: Allan Fisher [mailto:noreply@e2e.ti.com] Sent: Tuesday, October 25, 2011 9:58 PM To: int_nonisolated_dcdc_forum@e2e.ti.com Subject: Re: [INT - Non-Isolated DC/DC Forum] lmz10501 - ouput capacitance
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Hi Amit,
Having too much output capacitance may prevent the output from reaching the 0.375V at the end of the startup sequence. In such condition, the part will think there is a short circuit on the output and enter the hiccup mode described in Figure 3 (page 14) of the datasheet.
The maximum output capacitance to reach this condition depends on the output voltage configuration, the Vcon capacitor value, and the loading on the output. Table 1 (page 16) of the datasheet lists out conservative maximum capacitance values for several typical output voltage conditions. It assumes full load on the output and 1nF Vcon capacitor.
A couple of questions for you:
1. What is the application's output voltage and load current?
2. Why is 47uF output capacitance considered marginal in this application?
Denislav
Hi Denislav,
Please see the answers to your questions below -
1.2V/1A
The FPGA required to have 100uF of coupling and bulk capacitors.
Reading the datasheet, you clearly can see that it is recommended to not using more than 47uF for 1.2V output.
Could you advise how we can safely use the nano module for this application? Is there a way to tune the soft start?
From: Denislav Petkov [mailto:noreply@e2e.ti.com] Sent: Tuesday, October 25, 2011 10:33 PM To: int_nonisolated_dcdc_forum@e2e.ti.com Subject: RE: [INT - Non-Isolated DC/DC Forum] lmz10501 - ouput capacitance
The softstart time can be slightly reduced by reducing the VCON capacitor. However, that would still be insufficient to start with a 100uF output capacitor. Even 68uF would be challenging.
We can try other tricks involving 2-3 resistors, a capacitor, and a small signal BJT/FET and a diode and try to jump start it with a larger output capacitor. I am not sure if this is a good solution and may defeat the purpose of using a nano module. Please contact me directly with some details about the opportunity if you still want to explore that path. We would have to know the input voltage and whether they are using EN signal (and its voltage level).
I'm interested in this solution too.
Generally LMZ10501 is very convenient module to use it for fpga. Xilinx require 100+ uF capacitance in series of voltages.
Vccint for Spartan-6: 1.2V requires 105 uF
Vccaux for Kintex-7: 1.8V requires 108 uF
It would be nice if we can use such small module in such cases.