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LMR12010 Layout Considerations

Mario Bernhard1
Prodigy 50 points
Other Parts Discussed in Thread: LMR12010

Hello,

I'm planning to use the LMR12010 to get 3.3V from a 12V source. Now I would like to layout my board like described in the manuals PCB Layout considerations. In this section is written:

"There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching
node island."

What thus this mean paractically?  On the demo board I can't see a discontinuation of the ground plane.

Thanks for information.

Best regards

Mario Bernhard

  • 0
    TI__Genius 10095 points

    Hi Mario,

    This recommendation is probably unnecessary. 

    The reasoning is this.  The switch node has large voltage changes.  These can capacitively couple to a ground plane beneath the device.  So some engineers recommend removing the ground plane directly beneath the copper on the switch side of the inductor to minimize this coupling.

    However, the strength of the radiated field, and the ground bounce that is generated by the device is directly proportional to the loop area, which is increased when you cut the ground plane underneath the device.  The increase in circuit noise caused by this is more than is caused by the capacitive coupling from the Switch node.

    The engineer who wrote the datasheet followed one set of logic and the eval board was probably designed by some one else.

    I would recommend using an unbroken ground plane beneath the device, and make sure that a ceramic input capacitor is very close to the input of the device and the anode of the free wheeling diode.   This is the most important thing to consider in a buck converter layout.

    Take a look at the Layout tips for EMI reduction in DC/DC converters for more details.

    www.ti.com/lit/an/snva638a/snva638a.pdf
     
    Regards,
    Marc
  • 0 in reply to Marc Davis-Marsh
    Prodigy 50 points

    Hi Marc,

    thanks a lot for this information and explanation.

    In my application I use the LMR12010 to generate +5V and 3.3V out of +12V. So there's no problem to use the Output-Voltage as source for the Boost voltage, right?

    Best regards

    Mario

  • 0 in reply to Mario Bernhard1
    TI__Genius 10095 points

    5V and 3.3V out are within the voltage range of the boost circuitry.

     

    Marc