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Hi,
I am sorry but after asking around we do not have this data even in simulation
Thanks
-Arief
Hi Arief-san
Thank you for the confirmation.
If you have the calculating method of the output decoupling capacitor values
without the parasitic inductance and resistance, could you tell me it?
Best Regards,
Yokota
Hi Arief-san
Hi yokota san,
There is no exact way to calculate the value of capacitor. Since we do not have the data for parasitic inductance of the module, what i would do normally is to allocate an extra 1 or 2 capacitor pad on the PCB for adding capacitor after the prototype board has been built.
During prototyping phase, i would look into the spike high frequency ringing and measure that frequency of the ringing.
Once i have that information then i would find a capacitor that have a self resonant frequency at that ringing frequency. Then i add them to the board and re-check if the spike has been reduced. Then you repeat the process again for 2nd time. So far the capacitor will be 0402 or 0603 type of capacitor for reducing this high frequency ringing.
Also please keep in mind that these high frequency filter caps is only to reduce the high frequency spikes. You also need the other capacitor for load transient purpose.
Thanks and let me know if you have further questions. Sorry that i do not have the data for the parasitics, i know it will be nice to simulate it on the PDN. But i try this method before and it reduce those high frequency spike that is mentioned on the article i sent you.
-Arief