Original Question: LM3150 3.3V 4A supply goes into overvoltage mode by Folkert Roscam Abbing
I made a supply for 3.3V, 4A max. This runs of a 24V +/-10% supply. I used the webbench to design the supply and ended up with this design:
Although the supply is designed for max. 4A, it is normally loaded at 0.5-1A.
The problem I have now is that the output is about 3.58V. If I measure with an oscilloscope on the feedback pin, I can see the voltage goes from just below 600mV up to 720mV, after which the overvoltage protection is triggered. This does indeed limit the output voltage.
I tried limiting the on-time Ton by using a smaller Ron, giving me the following results:
Then I soldered in a 10uH inductor instead of the 6.8uH inductor, giving me the following results:
Verified Answer: RE: LM3150 3.3V 4A supply goes into overvoltage mode by Akshay Mehta
This goes with exactly what I said. If you are using Al-Els at the output, then I believe there is no need for the Cff cap, because there is enough ripple being sent to the FB node. The con here is that since the design employs Al-Els, there will be larger ripple at the output. Cff is required when ripple at the output is required to be kept very low.
Now, I investigated in the Webench calculations and here are a few comments. Webench decides the necessity of Cff based on a few criteria that the datasheet does not mention and I believe, were discussed with the concerned applications engineer at the time. But here is some simpler reasoning. The Cff value is calculated to have a certain gain for the ripple at the FB from the ripple at the output. In frequency domain, this can be thought of as a phase boost. Once the Cff value is established, the output capacitor limits are calculated. Based on the Cff value and the resulting ripple gain, the minimum limit of the cap ESR is then calculated. This minimum limit should satisfy the minimum 10mV stability ripple and a certain Ton criteria. This minimum limit effectively will keep the design stable. The maximum limit of ESR is then calculated based on the OVP of the device.
What was happening so far was that for your design after the Cff value was chosen, the min ESR for the output cap was set to be 8mOhms. This basically means that you could use ceramic caps with very low ESR and have a stable design and very low output voltage ripple. But the max limit that was calculated was more than 10 times this and was set at 100mOhms. Webench would then have a very wide range of output cap ESR presented to it when it goes to pick an actual part. This is why it suggested using a high ESR cap and now, since you had too much ESR and an additional Cff cap, it pushed a lot of ripple in to the FB node. You were able to correct the problem by removing Cff.
All this said, I do believe the calculations could be made a little more tighter and we will ask the webench applications team to look in to this. I hope my explanation helped clear some questions.
Question: RE: LM3150 3.3V 4A supply goes into overvoltage mode by Akshay Mehta
The engineer responsible for this part is out, but I am going to make some suggestions for your BOM. We might be able to give you a better answer right after the holidays. For this Constant On Time device, a feedforward cap is used to AC couple the output ripple directly to the feedback node. There is a minimum ripple that is needed at the feedback node for stable operation of the regulator. At the same time, if there is too much ripple it hurts the operation. I saw that your output cap (atleast on Webench. Not sure what the exact part number is that you have used.) had a larger ESR. This would cause a larger ripple being coupled in.
I have run a few simulations using two 100uF ceramic caps rated for 10 and 6.3V along with a smaller Cff cap (180pF) and a 10uH inductor. These alterations helped bring the output voltage near the desirable value on the simulations. I do not have a board for your conditions and therefore I would suggest that you try these alterations out on your board.
I hope this helps.
Question: RE: LM3150 3.3V 4A supply goes into overvoltage mode by Folkert Roscam Abbing
Thank you for you quick reply.
The capacitor I used is a Panasonic EEEFK1V331P, which has a series impedance (at 100kHz) of 80mOhm (330uF). According to formula 18 of the datasheet, the max ESR is around 80mOhm (with 6.8uH inductor and 400kHz frequency) if a feedforward cap is used, so this is indeed just on the edge. I will try you suggestions and post the results.
I have made two modifications to the power supply. I swapped Cff with a 180p capacitor and I swapped the output capacitor with a Panasonic EEEFP1V331AP (330uF, 60mOhm ESR) because this was the best I had available at the moment. The inductor was allready swapped with a 10uH inductor. With this, I still get an output voltage of 3.39V, so still a bit high. Enclosed I have a picture from the feedback signal. As you can see, it varies from 596mV to 658mV. Is this expected? The period varies a bit.
The 60mohm ESR might still be a little more. Do you have any small ceramics that you could connect in parallel or any smaller value ceramics (47uF E.g.) rated for 10V that can be used? The higher ESR along with the inductor ripple causes the higher Vout ripple. This Vout ripple is being coupled in to the FB node and that's why you see the ripple at the FB node. The min value on the FB node is about 600mV. When the FB voltage goes below 600mV, the driver turns the high side FET on and keeps it on for the on time.
Currently I do not have a better answer for you than suggesting use of a lower ESR cap. I will try and see if I can pass on more information.
One more thing you could try is to lower your DC operating point. If you reduce one of the feedback resistors to regulate to a lower value, then your actual output should be where you want it. I hope this helps.
The circuit has one 1uF and one 10nF ceramic output capacitor in parallel, but I will add some bigger output capacitances with low ESR and see what happens.
If the high side FET turns on at 600mV feedback voltage, won't the output voltage always be larger than the voltage set by the feedback resistor? This sounds unlogical to me. I also have made a 5V supply with the LM3150 and this does have a correct output voltage. In this supply, the feedback node voltage has a lower limit than in this supply.
I Tried your suggestion and added a 33uF ceramic capacitor at the output. Unfortunately, it did not give me the results I wanted. I still have an output of 3.38 to 3.47V (peak-peak). I tried adding a 3.3Ohm load, but the output voltage remains roughly the same.
For comparison, I looked at the 5V supply. This has an output of about 5.02V. The waveform at the feedback node looks roughly the same, with the low voltage around 600mV and the peak around 626mV.
The part actually regulates the valley. I was actually quoting the datasheet when I said that the control circuit turns the FET on when the feedback voltage falls below 600mV. That's why I suggested lowering the actual DC point to offset the valley. This way you could keep your existing components and effectively obtain 3.3V at the output.
If there is enough ripple at the output and Al-Els are what you have, then you could completely remove the Cff cap also. This would then basically take the output ripple, attenuate it by the feedback divider and pass it in at the feedback node. You'd still have a small offset, but now the ripple at the feedback node would be much smaller. I hope this helps.
I took a step back and tried what would happen if I try some variations of the original design.
I tried various values for Cff (none, 10p, 56p, 560p, 820p) and found the best results for no Cff (3.34V rms voltage). I also tried the result of higher Ron (75k, 82k and 100k). This did not seem to make much difference, except for the switching frequency. I have the design now working with 82k Ron, no Cff , a 6.8uH inductor and the original 80mOhm ESR 330uF output capacitor. The feedback signal is about 15mV p-p. I tested the design with light load and full load. Under full load, the RMS output voltage is 3.30V, with light load the RMS output voltage is 3.34V. This is quite ok adn within the tolerances of the resistors in the feedback network.
This leaves the question why webench suggests to use a 560pF Cff, as this seems to yield worse results.
Thank you for your response. This does indeed clarify why the Webench app makes the suggestion for the Cff capacitor. You would still need a slightly different ratio for the feedback resistors, as these now set the minimum output voltage (i.e. the valley of the ripple) and not the mean output voltage. Perhaps the Webench also compensates for this, as the output resistors suggested are 45.3k and 10k (instead of 45.0k and 10k).
You are welcome. We'd have to go through the calculation of the feedback resistors as well in Webench. Hopefully they will work on this soon.
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