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TLC77: TLC7701IPW

Part Number: TLC77

Dear All,

I am using TLC7701IPW device in our current program. We have connected 22uF, X7R capacitor to CT pin to provide 462ms delay as per the formula 2.1 x 10000*Ct. But I have tested at Ambient this circuit on 5 boards, I got delay around 690ms which is not supposed to be. Even if I consider 20% of capacitance tolerance (X7R is 10%) also, delay much not exceed 554ms. Please advise whether is there anything else needs to be considered for delay calculation. Immediate response is great appreciated.

  • Hi RANGA SWAMY K,

    We are investigating this issue. I believe the max delay allowed for this device is 2.1ms typical (4.2ms MAX) which corresponds to a delay capacitor = 0.1uF. This is because of the time it takes to charge and discharge the capacitor. The charge current is 50uA and the charge voltage is 1.1V. If you put a larger capacitor, the capacitor doesn't have the time to discharge completely so the delay is longer than expected (and not accurate).

    If you need a delay of 462ms, I will recommend using one of our newer devices such as TPS3808 with programmable delay between 1.25ms to 10s or TPS3890 with programmable delay between 40us to 30s. Would either of these devices work for your application?

    -Michael

  • In reply to Michael DeSando1:

    Hello Michael,

    Thank You for your reply. Since our design is completed, could you please recommend alternate device which is pin to pin compatible. This would really helps our design.

    Regards
    Ranga
  • In reply to Michael DeSando1:

    Hi,

    For larger capacitor values, is there any formula to calculate accurate delay.

    Regards
    Ranga
  • In reply to RANGA SWAMY K:

    Ranga,

    Since this is an older device, not much information is provided in the datasheet for applications with larger capacitor values than the 0.1uF used for the typical measurements. I have contacted our design team and also ordered some devices to verify on the bench. Please give until end of this week for a detailed analysis. Thank you!

    In the meantime, if you can provide a little more information about your testing:
    1. Have you seen this problem (longer delay than expected) every time with multiple different devices?
    2. Have you tried with multiple capacitors and/or verified the capacitance value? What type of capacitor are you using?
    3. Is your board layout clean? If there are any paths from CT pin to any other pin, the additional leakage current could explain longer delay times.
    4. What is the intended application for your design?

    Thank you!

    -Michael
  • In reply to Michael DeSando1:

    Hi Michael,

    Thanks a lot for your help. we really need actual min and max delay for this device for 22uf Capacitor.

    Please see below for requested information.

    1. Have you seen this problem (longer delay than expected) every time with multiple different devices?

    [Ranga]: Yes, I have seen it on five boards where delay vary in range 600ms to 690ms.

    2. Have you tried with multiple capacitors and/or verified the capacitance value? What type of capacitor are you using?

    [Ranga]: Yes, I have verified the capacitor value it is 20uf on one board. we are using ceramic XYR capacitor in design.

    3. Is your board layout clean? If there are any paths from CT pin to any other pin, the additional leakage current could explain longer delay times.

    [Ranga]: Our board layout is clean, there is not path which CT pin with other pins in our design.

    4. What is the intended application for your design?

    [Ranga]: It is used for commercial applications.

    Regards
    Ranga
  • In reply to RANGA SWAMY K:

    Hi Micheal,

    is there any update on detailed analysis for larger capacitor value (22uf) i s used in our design).

    Regards
    Ranga
  • In reply to RANGA SWAMY K:

    Ranga,

    I finally got the bench testing done and using 22uF, I saw a delay of 610ms. I then switched to the value capacitor used in the datasheet (100nF) and saw a delay of 2.9ms (which is within the min/max range of 1.1ms and 4.2ms). I spoke to the designers and they said there is no max value capacitor limitation. This leads me to believe that the wide range of the delay to begin with plus the tolerance of the capacitor can produce a valid delay higher than the typical calculated delay from the equation. The equation only gives a typical estimation but can't give a min/max tolerance for the actual delay.

    I recommend changing the capacitor value to match the delay you want (and verifying the delay is the desired value) or you can switch to one of our higher accuracy devices. We have a lot of newer devices with much better threshold and delay accuracy.

    Please refer to the "Programmable Delay" section in the Supervisor and Reset IC reference guide:

    http://www.ti.com/lit/sg/slyt361d/slyt361d.pdf

    Thank you!

    -Michael