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ucc2946 reset output independent of the watchdog

Lanzones
Prodigy 130 points

From the block diagram of the SLUS247f.pdf, I dont see the relation of the watchdog with the nRES output.. The only connection that connects the two are the Q output of the SR flipflop to the NAND gate.. If I look at the timing diagram of figure 4, the reset output is somehow related to the transition of the WDI and output of the WDO.. HOw is this possible if the block digram doesnt show any feedback to the reset function..

Is figure 4 possible if I do the next paragraph after that figure 4?.. CONNECTING WDO TO RES?.. Please advise as I am definitely lost in this document..

  • 0
    TI__Guru 55940 points

    Hi Lanzones,

    As mentioned in the section CONNECTING /WDO TO /RES, the reset and watchdog circuits have separate and independent outputs.  

    Figure 4 is a timing diagram demonstrates what the timing looks like when /WDO and /RES are operating independently.  If the two outputs are tied together, then if either /WDO or /RES were to go low, the other would go low at the same time.

    Very Respectfully,

    Ryan

  • 0 in reply to Ryan Eslinger
    Prodigy 130 points

    Thanks.. I fully understand tying the two output together. My next question is in the case of not tying op together. in the block diagram of the chip it doesnt show that the reset output would go low if wdi is not toggled.. i dont see visible connection at all on how the wdi would affect the reset out.. I think figure 4 timing is wrong... Res out should stay high regardless of wdi state.. According to the block digram.

    Iwould like to use the chip on my project and would like to know if it is what i really wanted in term of functionality...

  • 0 in reply to Lanzones
    TI__Guru 55940 points

    Hi Lanzones,

    The block diagram is intended to give an idea of functionality.  The timing in figure 4 is correct and is consistent with the text surrounding it.

    Very Respectfully,

    Ryan

  • 0 in reply to Ryan Eslinger
    Prodigy 130 points

    I have the chance to wire the chip yesterday and confirmed that the WDO doesnt influence the Reset output at all.. as describe on the block diagram.This is oppose to what is  diagrammed on figure 4. I was able to influence the RST out by tying the diode to the RTH line to the WDO op. it is a similar function to figure 4 but not same.. tying RST and WDO is not advisable at all as the low voltage is >1V and the current jumps to 60mA and getting the IC to destruction..


    Please check..