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TPS3421 with TS tied to VCC

Mark Chalmers
Prodigy 60 points
Other Parts Discussed in Thread: TPS3420

The datasheet for the TPS3420/1/2, revised March 2013, suggests in note (1) on page 3 that the TPS3421EG should not be used with TS tied to VCC and yet the rest for the datasheet suggests that this part supports a zero input delay if TS is tied to VCC.

Can I use the TPS3421EG with TS permanently  tied to VCC so that there is 'zero' delay (actually typically 150us) between  PB1 and PB2 asserted and RESET asserted?

  • 0
    TI__Expert 8905 points

    Hi Mark,

    Sorry for the delay in response  - I was out for the holidays.

    Using it in this configuration will just have a delay between the input and output as it disables the internal counter that provides debouncing - it makes the 150us delay a simple propagation delay. The debouncing time will likely depend just on the minimum valid pulse width for the internal logic to detect - basically, it's an OR gate (only asserts RST/ if both PB1 and PB2 are low).

    Regards,

    David