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TPS3600D33 Startup

tateo yamashiro
Guru 10890 points

Hi,

My customer has questions about TPS3600D33.
Could you tell me about questoins?

[Question]
 In startup condition, if VDD is not supplied and VBAT is supplied,
  - Whether the device output VBAT?
  - Whether the internal circuit active?(VBATOK is active?)

My customer is thinking VDD generate internal power supply.
If VDD is not supplied, he is worried about whether internal circuit is inactive or active.

Best Regards,
tateo

  • 0
    TI__Expert 8905 points
    Hi Tateo,

    If you do not use the "Battery freshness seal" mode on the device, Vbat will provide internal power to the part and connect Vout to Vbat when Vdd is below its threshold. You can use the battery freshness seal mode to ensure that if Vdd has not been connected since the mode was activated the Vbat input will stay disconnected until VDD goes above its threshold. As stated in the datasheet, the Vbatok will not be enabled until the RESET line goes high.

    Regards,
    David
  • 0 in reply to David Hopkins
    Guru 10890 points

    Thank you for your reply.

    I saw Timing Diagrum from datasheet. I think BATOK is enabled until /RESET is high. Could you explain more detail?

    And one more quetion. How can we caluculate V(SWP)?

    Best Regards,

    tateo

  • 0 in reply to tateo yamashiro
    Guru 10890 points

    Hi, my customer has more questions. Could you tell me about questions?

     - My customer doesn't use pins below. How should he set pins below?
       *the freshness seal mode is disabled.

        /CEIN:
        /CEOUT:
        /MR:
        /PFO:
        /RESET:
        WDI:

     - Could you explain how to disable the freshness seal mode? How should he set each pins?

     - How can we know value of quiescent current?(Iq=IDD+I(BAT)?)

     - How much is value of quiescent current under the following conditions?
       *the freshness seal mode is disabled.

        Vout=VDD,WDI is unused:
        Vout=Vbat,WDI is unused:   

    Best Regards,
    tateo

  • 0 in reply to tateo yamashiro
    TI__Expert 8905 points

    Hi Tateo,

    Vbatok starts HI - what I meant is that the measurement cycle does not start until RESET/ is HI (after either VDD/VBAT have passed their thresholds). RESET/ also starts HI, leading to that timing diagram - RESET/ will only go low once you have passed either threshold and then fall below the threshold.  Sorry for the confusion. 

    Regards,

    David

  • 0 in reply to tateo yamashiro
    TI__Expert 8905 points
    Hi Tateo,

    I will have to check on CEIN/ and CEOUT/ but I think they can be left floating. MR/ should be tied HI, PFO should be left floating, RESET/ should be floated, WDI should be floated.

    The Battery Freshness Seal is deactived once the part powers on and Vdd passes its threshold.

    The Iq will come from the EC table. If Vdd and Vbat are both above their thresholds, the max Iq is 40.1uA. If Vdd is below its threshold and Vbat is above its threshold, Iq is 48uA.

    For the customer's application of needing a simple battery crossover you may want to look at TI's ORing controllers or check on the Battery management forum for a simpler solution.

    Regards,
    David
  • 0 in reply to David Hopkins
    Guru 10890 points
    Thank you for your kind support.So Could you explain how to calculate V(SWP)?
  • 0 in reply to tateo yamashiro
    Prodigy 125 points

    Does TPS3600D33 has Battery freshness seal mode enabled initially?

    Is the process shown only to enable it again?

     

    Or it can be enabled only by process given. It will not come with battery freshness seal mode.

     

    Is there any EVM for enabling this mode? One EVM is shown on webpage of this product, but that is obsolete.

  • 0 in reply to Lalit Kumar
    TI__Guru 55940 points
    Hi Lalit,

    You need to follow the steps in the Battery Freshness Seal section (page 6 of revision B of the datasheet) in order to enter the freshness seal mode.

    Very Respectfully,
    Ryan
  • 0 in reply to Ryan Eslinger
    Prodigy 125 points

    Hi Ryan,

    I understand that. My question is different as mentioned above. If we want to implement that through analog switches in circuit, we have to add analog switch between the connections required and PFI, PFO, VDD, MR. As we can not open the enclosure we have to go this way and this should not create any issue whenever power is on or off to the board.

    With ergarsd

    Lalit