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Part Number: TPS3895
TPS3895 SENSE_OUT status is unknown during power on before VPOR and is shown in below highlighted area.
A 10k-ohm pull low resistor is used but during power on there is still a spike on SENSE_OUT.
May I know if there is any way to make sense_out low during power on?
We have a solution to keep the SENSE_OUT low until the VCC comes up then the device works as normal (SENSE_OUT will be just slightly lower than normal when "high"). It requires 2 external MOSFETS and 2 external resistors at the output. Q1 is N-FET and Q2 is P-FET. See solution below.
Will this solution work for you?
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In reply to Michael DeSando1:
In reply to Ting Ye:
We have ran some simulations and we believe this solution is valid. See the schematic and results below. Note: I have the SENSE_OUT pulled low until Vcc reaches ~1.5V which should be fine since the minimum recommended operating voltage is 1.7V.
Some bench testing is still needed but I have some parts to aim for now.
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