Hi,
I'd like to know the behavior at present sense voltage before power up. So can you give your comment for following question?
- Can you recommend to input SENSE voltage before powering VDD?
- If Q1 is recommended, the reset keep low after power up at 0V < VSENSE < VITN ?
- If Q1 is recommended, the reset goes high after tD duration at VITN < VSENSE ?
Best Regards,
Satoshi / Japan Disty