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TPS3813: Used as clock monitor

Part Number: TPS3813
Other Parts Discussed in Thread: TPS3850

Hi all,

in our design we are trying to use the TPS3813K33DBVT as clock monitor in order to verify the presence of a 25Mhz3.3 LVCMOS Clock connected to the WDI input.

The goal is that if the input clock is not present the open drain output should be mantained at low level. 

I tryed all the four basic possibilities by connecting WDR and WDT to GND and VDD respectly but I Always see the output resetting periodically...with different period depending from these pins.

Is possible to perform this task with this device?

If is not possible can you suggest me if there is a device with same package to perform this task?

Any suggestions?

Regards

Alberto

 

  • Hi

    We will review the use case and get back to you by Wednesday July 5th on this topic.

    Thanks

    Chintan

  • Alberto,

    The functionality of the watchdog, in general, is to check for a pulsing signal within a window and trigger a reset if outside of the window. On the next window, the device output will start over and check again. It sounds like you want a latching watchdog which means the watchdog stays low when the pulse is outside of the window and will remain low until the device power is turned off then on? If this is the case, you can use TPS3850 and connect /WDO to CRST through an open-drain buffer.

    Can you provide feedback on if this is what you desire?

    -Michael