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TPS3828: Unable to get part to exit RESET condition using /MR input

Part Number: TPS3828
Other Parts Discussed in Thread: TPS3820

Although I am NOT toggling WDI during assertion of /MR, the part seems to have stubbornly latched the RESET state, asserting /RESET, and not responding to subsequent assertion/de-assertion of /MR. 

Per Table 1 on page 11 of the datasheet (SLVS165K –APRIL 1998–REVISED NOVEMBER 2015) it would seem that /MR can be asserted then de-asserted and /RESET should release after td has expired. Is this not correct? 

I have tried asserting /MR with WDI held either LO or HI during the entire "reset period" as defined from assertion to de-assertion of /MR + td (max) but the results are the same.

NOTE: There is an error in the datasheet (SLVS165K –APRIL 1998–REVISED NOVEMBER 2015) - Section 5, page 5, the Device Comparison Table indicates the /RESET output of the TPS3828 to be Push-pull. Per text in Section 1 and 9.2.1 the TPS3828 /RESET output is Open-drain. I missed this in original design but have since added a pull-up to the /RESET output.

  • Additional info: I am operating from +3.3V supply rail on VDD.
  • John,

    Your understanding of Table 1 is correct.
    I think the error is how WDI is defined when the device is in reset condition. The WDI should not be active and should be high impedance. If WDI remains high or low passed the timeout delay, the device will keep resetting.

    Can you provide the scope capture of the WDI pin, /MR pin, and /RESET pin for the "bad" case?

    -Michael
  • What constitutes "high impedance" to the WDI input circuitry? I changed the pin driving this to be an Input (MSP432P401R) without any pullup/pulldown but is the 10MOhm to ground in my scope probe sufficient to be detected as "not-floating"? I initially had a logic probe (Tek MSO4000) which is about a 20K load connected to the WDI input but swapped that for a traditional scope probe and still it just shows as 0V. Thus far any scope captures show /RESET LO and WDI at 0V...

    Based on the fact that I SHOULD be able to use /MR as I have described I will try lifting the WDI pin (truly floating!) and verify that I can get /RESET to de-assert.
  • Lifting WDI did NOT get the part out of reset...suspecting a part issue I tried a second board in the same configuration (floating WDI)...and it has the same issue. Nagging suspicion led me to check the IC marking and it turns out the 5V part was entered into the BOM and duly placed onto the assembly. This answers why the part stays in reset when supplied with 3.3V

    My previous question does remain to some degree - what would constitute "high impedance" to the WDI input? If I can just set the pin driving it as an input on the MSP432 (it can be set as an analog input to prevent a floating voltage from drawing excess current) and do not have to modify the board with a FET as shown in the datasheet that would be ideal.
  • John,

    Here are some notes I have on MCU pins (specifically GPIO pins):

    "Each port is assigned several 8-bit registers that control the function of the pins and provides information on their current status. The following is a list of registers always available for ports:

    PxSEL and PxSEL2 – These registers selects whether the pin operates in GPIO mode or is used for a specialized function as described in the pinout. PxSEL2 is not always available and is used to augment the number of multiplex options if the pin has various specialized functions. Setting PxSEL to 0 selects GPIO mode.
    PxDIR – If the pin is set to operate as GPIO, the bits in this register select whether a pin is a high impedance input (0) or an output(1).
    PxOUT – If the pin is set to operate as GPIO Output, this pin selects High (1) or Low (0) output.
    PxIN – If the pin is set to operate as GPIO Input, this pin indicates whether the voltage at the pin is High(0) or Low(0)"



    To get your GPIO into "high impedance" thus not having any impact on the state of WDI pin, you must use the PxDIR register and set to 0 to cause the pin to be high impedance. From the WDI perspective, it will look like nothing is on the line so the device will considered WDI disabled and will generate its own internal WDI signal. See the TPS3828 WDI description below:



    "The watchdog timer can be disabled by disconnecting the WDI pin from the system. If the WDI pin detects that it
    is in a high-impedance state the TPS3820/3/4/8 will generate its own WDI pulse to ensure that RESET does not
    assert. If this behavior is not desired place a 1kΩ resistor from WDI to ground. This resistor will help ensure that
    the TPS3820/3/4/8 detects that WDI is not in a high-impedance state."

    So please try "high impedance" mode on your GPIO that connects to WDI and see if the system works. Keep me updated for additional support. Thank you!

    -Michael
  • Thanks for the suggestion/validation - I actually already had that code implemented before I found out that I had 5V parts in there....with 3.3V parts everything works perfectly. I can confirm that setting the WDI pin on the MSP432 as an input while asserting /MR is enough to keep the part from latching the reset state.