Dear team,
I have a question about TPS3851,
If UVLO happen, voltage< 1.35V, does reset always lock to low?
Thanks.
Best regards,
Sammi
Hello Sammi,
As Kai said, RESET will be driven low and stay low if VDD falls below 1.35V as listed under the electrical characteristic table in the datasheet. (Seen below)
.
This also shows the case Kai mentioned about VDD falling below VPOR, which is the minimum voltage for the device to display RESET correctly.
Thanks,
Abhinav.
Hello Luck,
The TPS3851 recommended operating conditions are listed at minimum 1.6V and VUVLO (1.35V) is a condition outside of its monitoring window. RESET should be driven high again if VDD is higher than 1.35V, as this condition is only low when VDD falls below that threshold.
However, remember that this condition exists:
As you can see in (3), VDD must be 1.6V for 300us which means that the output of RESET between 1.35V and 1.6V is unreliable.
To summarize, RESET should be valid and correlate with VDD after VDD is 1.6V for atleast 300us, and you don't need to worry bout RESET latching when above 1.35V and staying low if that is your concern. It will only be driven low and stay low while under 1.35V unless there are miscellaneous circumstances.
Thanks,
Abhinav.
