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TI Home » TI E2E Community » Support Forums » Power Management » Sequencers » Sequencers Forum » TPS3307-18 - Does not release reset on power up
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TPS3307-18 - Does not release reset on power up

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David Paden
Posted by David Paden
on Apr 10 2012 10:39 AM
Intellectual760 points

We have a design using the TPS3307-18 voltage supervisor, but we noticed that sometimes it does not release the reset line with a lower battery level.

The design seems to work fine with an input voltage source of about 4.0V on the battery input.  This nets about 3.5V on the VDD pin (we're drawing a lot of power and we're dropping voltage on the power supply cables), 3.29V on SENSE1 (Vit = 2.93V), 1.80V on SENSE2 (Vit=1.68V), and 1.58V on SENSE3 (Vit=1.25V).  In this case it starts up fine.

When operating with the lower supply voltage of 3.6V, the /RESET pin does not go high.  In this case, we have 3.27V on VDD, 3.273 V on SENSE1, 1.807V on SENSE2, and 1.496V on SENSE3.  All of these values seem to be above the minimum thresholds to release the /RESET output, so why isn't this happening?

Please note that we have another supervisor, TPS3808, monitoring our 1.2V rail which is the last rail to come up.  The /RESET pin of the TPS3808 drives the /MR pin of the TPS3307-18.  However, we noted that the TPS3808 is releasing its /RESET output as expected in both voltage scenarios.

Also, the 3.3V and 1.8V rails (SENSE1 and SENSE2) come up together, but the battery input rail (SENSE3) should be the first to come up.

TPS3307
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  • Darwin Fernandez
    Posted by Darwin Fernandez
    on Apr 10 2012 12:50 PM
    Genius11670 points

    Hi David,

    The SENSE voltages are above the threshold and VDD is still within the recommended operating voltage to power the device (despite the voltage droop) so it seems that this may not be the problem.

    How is the TPS3808 output (MR pin) connected? Is it pulled up to a voltage rail? 

    Please attach a circuit schematic and possibly waveforms of the MR, SENSEx, VDD, RESET. This will help understand what could be happening. 

    Regards,

    Darwin

    reset TPS3307
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  • David Paden
    Posted by David Paden
    on Apr 10 2012 14:42 PM
    Intellectual760 points

    1464.TPS3307_schematic.pdf

    I've attached the schematic as PDF.  The /CPU_POR_IN line has a 10K pullup resistor near the processor and the /PWR_RES pin is driven by the PMIC low until the +BATT(SW) rail goes above a threshold.

    We measured the SENSE3 pin after the divider, and the /RESET of the TPS3307-18 at the pad inside the resistor.

    It will be difficult to set up to capture the waveforms of these pins, but can be done if necessary.

    Thanks,

    Dave

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  • Darwin Fernandez
    Posted by Darwin Fernandez
    on Apr 10 2012 17:45 PM
    Genius11670 points

    Hi Dave,

    I tried recreating this in lab: VDD=3.27V, MR=3.3V, and varied SENSEx. The device was able to reset HIGH and LOW.

    Make sure the other two signals (PWR_RES and CPU_POR_IN) are not accidentally driving the pins. One quick way to test this is to remove resistor R213 and R215 and then try varying SENSE signals and look at RESET. Also be sure you measure the voltages directly at the pins of the IC, the voltages may be lower and maybe out of the recommended range of the IC, especially if the voltages are dropping due to high current. Please verify this.

    I also recommend driving MR without the pull-up resistor on the output of the TPS3808. The TPS3307 has an internal pull-up resistor to VDD and you will have excess current from VDD to 3.3V with the pull-up resistor on the TPS3808 output. This will also prevent the voltage on MR from going above VDD and reaching the abs max rating if VDD droops too low.

    Regards,

    Darwin 

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