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A likely error in TPS3305 document
I would like to ask a question on TPS3305.
I suspect the connection diagram on page 1 of SLVS198C, the manual for TPS3305, is wrong. Because it has actually tied 3.3V output, 1.8V output, SENSE1 and SENSE 2 all together, which doesn’t seem reasonable.
Is it really an error of the diagram?
You are correct that this diagram is incorrect. The schematic trace connecting the 1.8V and 3.3V buses is incorrect.
I see it.
Why are reset supervisors used for processor? Would voltage regulator alone be enough?
The SVS is only used to monitor the voltage on the processor's core and IO bus. The actual core and I/O voltages are generated by a separate voltage regulator.
Why processor's core and IO voltage needs to be monitored? Without TPS2808 (3305, etc.) can processor still run normally?
As the above picture (page 183, SPRS345d) shows, DSP might need to "Wait for the power supplies to reach normal operating conditions while keeping the POR pin asserted (driven low).", so is this what the reset supervisor is doing?
And regarding the initialism "SVS", what does it mean?
The SVS (Supervisor) ensures that all processor voltages are above the specified voltage and stable before the processor is allowed to leave the reset state and start operating. If you are using multiple TPS3808 SVS ICs, I would like to recommend the TPS386000 which might save you some space and possibly some cost on your board.
I see it, thanks very much.
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