I have a design using a UCD90160 to control 9 supplies. Two of these are negative, so translators are involved. All 9 supplies are set up for PWM margining and active trim is enabled. The 9th supply happens to be negative and is controlled through GPI3/PWM3. We have modified boards to try any of the other three available PWMs, but the results are the same.
The translator on the monitor side is simply an opamp with a gain of -.x where x places the voltage being monitored in the range of the monitor inputs of the sequencer.
The translator on the PWM side consists of a high speed comparator with a1.65V reference, the output which swings between +3.2 and -2.9V in response to the sequencer's output. (The outputs have 0.1V saturation). As the comparator can't be placed in tri-state mode, the sequencer must be placed in either active trim or active duty cycle mode. If this is not done, the output of the comparator will be at one of the rails, depending on the output of the sequencer. The T filter and power supply feedback divider are designed such that at 50% duty cycle, we get the nominal voltage, and between 0 and 100% duty cycle, the output will vary by +/-9%. This works very well.
The problem we are having, now that we are entering the end of the design cycle, is that unlike all the FPWM outputs, the PWM output being used for this supply seems to self start in tri-state mode, leaving the rail at one of its limits.
We currently have two different work arounds:
1: The chip is initially programmed (in flash) with Active Trim enabled with 50% duty cycle as the center. We write a margin config command to specify tri-state mode (disable), write a PWM config command to twiddle that value, then write another margin config command to specify active trim. This starts the PWM and everything begins operating properly. This assumes we can get the registers written before the power up timer expires.
2: The chip is initially programmed (in flash) with Tri-state PWM output, 50% DC center, and unlimited time for power up on that channel. We then write a PWM configure command to specify active trim, starting PWM. We then monitor the vout until its in range and then enable the startup timer.
The real issue with either of these solution is that it involves the local microprocessor, which is held in reset until all supplies are deemed good. This negative supply is not good yet, so technically, reset shouldn't be released. Since the processor doesn't rely on this particular supply, we have taken it out of the reset logic so the processor can start up and fix the problem.
So, now comes the question...
How do we make the Sequencer start active trim activity with the PWM channels right off the bat on its own? It appears the register order dependency is violated in the sequencer's firmware, which we can't change. The register values seem to be correct.
Thanks.
