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Configuring the TI-UCD90120A used in Xilinx AC701 board

Other Parts Discussed in Thread: UCD90120A

Hi, 


In order to meet the requirements of my project, I need to change the value of GPIO17 pin 34 of U9 (UCD90120A) in Xilinx AC701 evaluation board from '0' to '1'. 
I have downloaded the Fusion Digital Power Designer tool and with this tool i can assign different values to different pins of UCD90120A. 
The problem is : 
When I apply my changed, and press the " write to hardware" button, PMBus starts a never-ending process, printing the followings in the log window : 


14:41:47.870: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:41:47.867 [0x03274F5B000B3A8A] to RAM
14:41:57.873: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:41:57.868 [0x0327766C000B3A8A] to RAM
14:42:07.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:42:07.861 [0x03279D75000B3A8A] to RAM
14:42:17.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:42:17.860 [0x0327C484000B3A8A] to RAM
14:42:27.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:42:27.860 [0x0327EB94000B3A8A] to RAM
14:42:37.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:42:37.861 [0x032812A5000B3A8A] to RAM
14:42:47.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:42:47.864 [0x032839B8000B3A8A] to RAM
14:42:57.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:42:57.863 [0x032860C7000B3A8A] to RAM
14:43:07.865: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:43:07.862 [0x032887D6000B3A8A] to RAM
14:43:17.868: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:43:17.864 [0x0328AEE8000B3A8A] to RAM
14:43:27.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:43:27.861 [0x0328D5F5000B3A8A] to RAM
14:43:37.873: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:43:37.870 [0x0328FD0E000B3A8A] to RAM
14:43:47.869: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:43:47.866 [0x0329241A000B3A8A] to RAM
14:43:57.862: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:43:57.859 [0x03294B23000B3A8A] to RAM
14:44:07.865: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:44:07.861 [0x03297235000B3A8A] to RAM
14:44:17.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:44:17.864 [0x03299948000B3A8A] to RAM
14:44:27.865: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:44:27.861 [0x0329C055000B3A8A] to RAM
14:44:37.863: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:44:37.859 [0x0329E763000B3A8A] to RAM
14:44:47.870: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:44:47.867 [0x032A0E7B000B3A8A] to RAM
14:44:57.872: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:44:57.869 [0x032A358D000B3A8A] to RAM
14:45:07.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:45:07.861 [0x032A5C95000B3A8A] to RAM
14:45:17.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:45:17.864 [0x032A83A8000B3A8A] to RAM
14:45:27.866: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:45:27.863 [0x032AAAB7000B3A8A] to RAM
14:45:37.869: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:45:37.865 [0x032AD1C9000B3A8A] to RAM
14:45:47.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:45:47.864 [0x032AF8D8000B3A8A] to RAM
14:45:57.871: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:45:57.868 [0x032B1FEC000B3A8A] to RAM
14:46:07.865: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:46:07.863 [0x032B46F7000B3A8A] to RAM
14:46:17.863: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:46:17.860 [0x032B6E04000B3A8A] to RAM
14:46:27.868: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:46:27.864 [0x032B9518000B3A8A] to RAM
14:46:37.870: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:46:37.868 [0x032BBC2C000B3A8A] to RAM
14:46:47.863: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:46:47.859 [0x032BE333000B3A8A] to RAM
14:46:57.874: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:46:57.871 [0x032C0A4F000B3A8A] to RAM
14:47:07.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:47:07.861 [0x032C3155000B3A8A] to RAM
14:47:17.865: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:47:17.862 [0x032C5866000B3A8A] to RAM
14:47:27.868: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:47:27.864 [0x032C7F78000B3A8A] to RAM
14:47:37.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:47:37.864 [0x032CA688000B3A8A] to RAM
14:47:47.866: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:47:47.863 [0x032CCD97000B3A8A] to RAM
14:47:57.872: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:47:57.869 [0x032CF4AD000B3A8A] to RAM
14:48:07.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:48:07.863 [0x032D1BB7000B3A8A] to RAM
14:48:17.868: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:48:17.865 [0x032D42C9000B3A8A] to RAM
14:48:27.864: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:48:27.861 [0x032D69D5000B3A8A] to RAM
14:48:37.865: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:48:37.862 [0x032D90E6000B3A8A] to RAM
14:48:47.863: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:48:47.861 [0x032DB7F5000B3A8A] to RAM
14:48:57.870: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:48:57.867 [0x032DDF0B000B3A8A] to RAM
14:49:07.862: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:49:07.860 [0x032E0614000B3A8A] to RAM
14:49:17.866: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:49:17.863 [0x032E2D27000B3A8A] to RAM
14:49:27.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:49:27.864 [0x032E5438000B3A8A] to RAM
14:49:37.862: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:49:37.859 [0x032E7B43000B3A8A] to RAM
14:49:47.868: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:49:47.864 [0x032EA258000B3A8A] to RAM
14:49:57.863: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:49:57.861 [0x032EC965000B3A8A] to RAM
14:50:07.867: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:50:07.864 [0x032EF078000B3A8A] to RAM
14:50:17.862: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:50:17.859 [0x032F1783000B3A8A] to RAM
14:50:27.875: UCD90120A @ 101d: RUN_TIME_CLOCK [MFR 07,0xD7]: wrote 2015-10-12 14:50:27.871 [0x032F3E9F000B3A8A] to RAM
......


Questions : Is it normal to take hours to finish writing the new configurations in the hardware?
                      any steps missing?
                      any feedback will be helpful. 

Thanks in advance, 
MJ