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LM3880 ISSUE

Akshay hublikar
Intellectual 280 points
Other Parts Discussed in Thread: LM3880

I am using LM3880-1-AA  IC to control power on and power off sequence for a xilinx FPGA.

I am controlling three DC-DC converter enable pins with the sequencer IC LM3880.

But as per the previous revision of the datasheet released in 2014 , there was no notes about dos and donts , which is added only  in feb 2016 released datasheet.

As a result i  have connected common 5V to both  VCC and EN pin.  With this i see that my power on sequence  is still working fine , The three DC_DC converter outputs 1V>1.8V and 3.3V are fine.

But during power off all the voltages go off together simultaneously , can you let me know how i can achieve power off sequence properly.

The new datasheet clearly tells that VCC and EN has to be powered with separate voltages, but i have not followed it , as i was referring to old datasheet revision.

Regards

Akshay

  • 0
    TI__Intellectual 2010 points

    Akshay,

    While it is recommended to use separate lines for VCC and EN, your power up and power down sequence should still work if you have both of them tied. This was recommended based on FLAG glitch caused by the slow  VCC slew rate plot shown below:

    This plot shows the FLAG lines spike during when the VCC line is powered up using a slow rising voltage line. To avoid this spike, it was recommended to use a faster slew rate VCC signal. Are you seeing any problem in power down sequence? If so, would you mind sharing some data. 

    Thanks

  • 0 in reply to Kaisar Ali
    Intellectual 280 points
    Hi Kaisar

    Sorry for the delayed reply.

    Power up works fine for me , but power down happens simultaneously, But for my application this behavior is still fine.

    Thanks for your inputs.

    Regards
    Akshay
  • 0 in reply to Akshay hublikar
    TI__Intellectual 2010 points

    Akshay,

    The power up and down sequence is controlled solely by the EN voltage. Vcc is the supply for internet circuitry. I think it might be that your Vcc is shutting OFF before the EN and thats causing a shut down of all flags together and they might not be controlled by EN at this point. I have to experiment it myself in lab and will get back to you soon. 

  • 0 in reply to Akshay hublikar
    TI__Intellectual 2010 points

    Akshay,

    If you tie together to Vcc and EN, you should have a resistor divider between VCC and EN as this application diagram suggests:

    The purpose of this resistor divider is to keep the EN voltage below Vcc+0.3V max. Please keep in mind this will only do a power up sequence, not the power down sequence because you are cutting off the supply voltage and EN at the same time. All three flags will sequence down together if you choose to tie Vcc and EN together. 

    Hope this helps.