UCD90124: UCD90124

1)

How can I configure the UCD90124ARGCT to assert one of the GPO like Pin25 GPIO13 below

To assert LOW for 't'  TIME defined and then go HIGH.

The event of this happening is the assert of System_Reset or (or is not Boolean) the WDO timer ?

2)

Will all GPO i configure , will be pulled  LOW if i pull device ResetN to LOW ?

And the asserted HIGH

Thanks
Is it ok to pull seqencer device reset Pin to LOW as a result of sequencer System reset Active?
All the board PSU's DC DC TI54020xx Enable will be pulled low when the sequencer pins are Open drain at that time..
I saw in the FAQ it is not recommend to reset device during operation unless i can use the Watchdog Timeout pulse Low and then High to pull the DC DC Enable Low.
My previous mail ...

Thanks.. regarding # 1 : will this be happening in the event of  Resetting the device ?

I prefer to use the WATCHDOG_TIMEOUT when the to pull LOW and then HIGH or Open Drain as below.

If not possible then do you mean that during device ResetN this delay setting will make the pin held LOW for T time after device ResetN?

Please send print-screen example.

No, we do not recommend reset approach as explained in the document.
If you want to shutdown the system purposely, you can connect the PMBUS_CTRL to the host and configure the ON_OFF_CONFIG of rails to CONTROL PIN Mode, so host can toggle CONTROL signal to turn on and off the rails.
Regards
Yihe

I agree but what if my SW is stuck and i want it to power down and up rails when SEQUENCER WATCHDOG Reached it's timeout?

If your host is stuck, the system watchdog output can help to reset the host itself and keey the rest system alive.
or you have to power down and up the whole system?
Regards
Yihe

Yes , i activated the  hw sequencer internal watchdog reset to SW using the seque cer 'System Reset'  and it does help.

However , There are cases (very rare)  that we want to do power cycle. I tend not to do it but i want to check option to do it using the sequencer.

Ok, i understand i cant use the internal  Sequencer Watchdog to disable the GPIO's external Power enables .. i use it now only to recover SW if stuck using the sequencer " System Reset"

 However , At some times i want to reset the whole power. As i mailed before , i want to connect the "System Reset" to the sequencer "Decice Reset" so that when is activated the Seqencer will get Reset and all it's Gpio's will go onto Open-drain , including the "Sstem Reset" GPIO , thus letting external pull downs resistors on board to disable the DC DC . 

When the Sequencer comes out of Reset the Gpio's will go into their active Driven High thus enabling the board's DC DC and releasing the pull downs . 

The System Reset that connects to the device reset id 20ms duration but its falling edge will already put device into reset immidiatelly.

 

I understand its not much tecomended but why? ..seems this is only option to reset power and it worked for me

 

If the system reset is connect to back the PMBUS_CTRL pin, will this help to achieve the same function.
Resetting UCD is not recommended to power off the system.
Regards
Yihe

Hi

Can I control the pulse width of the WDO ?

What is the current default  duration ?

The question is actually can I increase it above 32256 ms ?

The reset period is cap at 32.256s. 

Could you please what you wan to achieve?

The WDO output is a level output, if you want to generate a pulse, please combine the system watchdog and system reset function together

Regards

Yihe

Is there away to write a value to the internal flash via the SMB BUS ?
Or write into the RAM and copy command to the FLASH ?
This value is to be saved after unit power up .

You can issue a PMBUS command to update the content in the RAM and update the RAM copy into FLASH.
Please refer the www.ti.com/.../slvu352f.pdf for the commands.
thanks
Yihe

How many times can I write into flash – what's the limitation ?

What can cause that data stored into flash is actually not kept  after repower.

In our application SW writes into flash by copying sector into RAM – update and thern write again into flash – even for one value change .

 

It is min 20K cycle.
Do you see the data not stored into flash after repower? Did you clik STORE RAM INTO FLASH?
In the R&D stage, you may change the setting many times, but once the design is finazlied, will you still update the setting on the fly?
Regards
Yihe