UCD90240: Setting GPIO pins to open drain?

Vikram Patel

Part Number: UCD90240

When using this chip in Fusion Digital Power Designer I am having trouble setting the GPIO pins (GPIO1-24) to the open drain configuration. Most of the devices that I am connected to are 1.8V IO so open drain in conjunction with pull ups works best for my application. The note on the side of the program infers that I can do this but I don't see how.

over 6 years ago

0 yihe over 6 years ago

TI__Guru 57940 points

The snapshot you took is from the configuration of GPI(General Purpose Input), which is a input. but the open drain is a output function of the device. If you click the Logic Controlled GPO, you will see the open drain option.

The side notes in the GUI is a general comment for all IOs but it does apply when the IO is used as a input for the system.

Hope this clear your concerns.

Yihe

0 Vikram Patel over 6 years ago in reply to yihe

Prodigy 30 points

Under the Command Controlled GPO options I cannot configure the output like I can with the General purpose inputs. Does this mean that the GPIO pins cannot be configured in open drain and only the LGPO pins can?

0 yihe over 6 years ago in reply to Vikram Patel

TI__Guru 57940 points

the logic GPO and Enable signal can be configured as open drain, but not on the command controlled GPO.
please refer www.ti.com/.../slvub51
regards
Yihe

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UCD90240: Setting GPIO pins to open drain?