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TPS1H100-Q1: Spec VDS Clamping Voltage Question

Part Number: TPS1H100-Q1

Hi team,

I have a question about VDS internal clamping voltage. In datasheet, the spec is from 50V-70V. But actually when the supply voltage is >36V, the device may be damaged. So I am not sure what we need a 50V-70V clamping voltage here. Could you kindly share your comments?

Regards

Michael

  • Michael,

    The VDS clamp is an integrated feature on the TPS1H100 that helps protect the device when switching an inductive load. If the voltage is not clamped then the FET can break down due to the large negative voltage on the output pin during turn off.

    During turn off, due to inductive characteristics, the energy of the circuit is dissipated on the high side switch itself. If the energy that is to be dissipated is within the allowed spec, freewheeling circuitry is not necessary saving on system level costs.

    Note that the maximum amount of energy dissipation depends on ambient temperature, device intrinsic capacity and board dissipation condition.

    For more information about the clamp as well as detailed analysis of the energy dissipation refer to Section 7.3.3 (Inductive-Load Switching-Off Clamp) on the TPS1H100-Q1 datasheet. I have linked it in this reply for your convenience.

    Datasheet

  • Hello,

    The supply voltage is rated from VS pin the device ground and the max value is 40V. The FET max drain to source voltage is different because the OUTPUT (FET source is floating). The drain to source clamping voltage is for driving inductive load. If the laod inductance is energized and the FET turns off, a very high negative voltage will appears on the OUTPUT(source). Without the internal clamping, the FET can be damaged due to very high transient voltage when it turns off the inductive load. The higher the clamp voltage, the faster the demagnitization time. If the device does not have an intermal clamp, it is a must to add and external clamp if the laod is inductive.

    Regards