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Part Number: TMS320DM6437
I m working on custom board based on tms320dm6437. sclk remains low even after reset (which i see by probing). i m initializing i2c a shown below,
I2C_ICMDR = 0; // Reset I2CI2C_ICPSC = 2; // Config prescaler for 27MHz //13I2C_ICCLKL = 40; // Config clk LOW for 100 kHz //5I2C_ICCLKH = 40; // Config clk HIGH for 100 kHz //5I2C_ICMDR |= ICMDR_IRS; // Release I2C from reset
my UART is working fine which is also based on AUX clk, but I2C is not working. what could be the problem??
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In reply to Pavel Botev:
In reply to ateequeur rahman:
ateequeur rahmanICMDR 0x00000020 I2C Mode Register [Memory Mapped]
ICMDR MST = 0, this means DM64x I2C module is in slave mode. In I2C slave mode, this SCL pin is an input. PLL1 values and I2C module prescaler and divider values takes effect on SCL line only when DM64x I2C module is master. When DM64x I2C module is slave, it is waiting for clock to be generated and supplied on SCL pin by the external I2C chip (which is master).
For more info, check below sections of I2C user guide.
2.2 Clock Generation
2.7 Operating Modes - Slave-receiver mode
2.11.2 Configuring the I2C in Slave Receiver and Transmitter Mode
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