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Part Number: 66AK2H14
In our board we have 3 processor ,out of which 1 is configured as Centralized Processor (Called CP henceforth) and 2 Distributing Processors (Called DP henceforth). we need to send data from DP to CP through hyperlink .
So I need both the hyperlink interfaces to be operated at a time, with full 10Gbps data-rate.
our hardware engineer confirmed about this with forum , i have attached the link here.e2e.ti.com/.../600664
My question is how to achieve this in software?
Whether I need to simply copy the code for PORT 0 and PORT 1 or there is any other way to do this?
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In reply to Pavel Botev:
In reply to mahima shanbag:
mahima shanbagMy question was how to make both hyperlinks[PORT0 and PORT 1] works at a time.
mahima shanbagSo we need both the ports work at a time.
mahima shanbag1.How to achieve this in software?
The hyplnk example that is coming with K2H PDK is using port 0 (hyperlink0) or port 1 (hyperlink1). You need to modify that example to use both ports.
mahima shanbag2. Whether I need to copy the required function
Yes, you can dump hyperlink0 (port 0) settings (like registers values, pins configuration, interrupt configuration) and apply these to hyperlink1.
mahima shanbagor there is any other way to do this?
I am not aware of other way than reusing the PDK hyperlink example
In reply to Yordan Kovachev:
In reply to lding:
I was trying to run the Hyplnk_PORT0 example in CP using Jtag in DSP core 1 with DP1(flashed Hyplnk_PORT0 application to DSP core0).
Link was up and it was about to read write but data transfer failed .
I thought this was due to ,
Hyplnk_PORT0 example running in DP1 was flashed to DSP core 0 and in CP it is in DSP core 1.
So I tried flashing the Hyplnk_PORT0 example to DSP core 1 of DP1 instead of DSP core 0.
MulticoreImageGen.exe LE 55 hyplnk_app 6 hyplnk1_rprc .
But when I change the boot mode it got stucked at
jumping to user application......
Now my question is
1. Whether my assumption about the data transfer failure ( due to Hyplnk_PORT0 example running in DP1 was flashed to DSP core 0 and in CP it was in DSP core 1.) is correct?
2. How to flash the application into DSP core 1 instead of DSP core 0?
Please help me with this.
Thanks and Regards,
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