This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

  • TI Thinks Resolved

TMS320C6678: What's the mechanism of Hyperlink handshake?

Part Number: TMS320C6678

Hi,

I have a custom baord with 2 DSP(C6678), and i can link up the Hyperlink between them when I power on 2 DSP at the same time(may roughly the same time) by using the Sample code of KeyStone_HyperLink_Init().

But when I individual re-power one DSP, I found it will stack at KeyStone_HyperLink_Init() function.(Another DSP wil go into While loop and never touch Hyperlink CFG anymore after Hyperlink linked up) 

In KeyStone_HyperLink_Init(), it will stack at the bonded while loop:

/*---------wait for link status OK-------------*/
while(gpHyperLinkRegs->STS&CSL_VUSR_STS_SERIAL_HALT_MASK);
while(gpHyperLinkRegs->STS&CSL_VUSR_STS_PLL_UNLOCK_MASK);
while(0==(gpHyperLinkRegs->STS&CSL_VUSR_STS_LINK_MASK));
while(0==(gpHyperLinkRegs->LINK_STS&CSL_VUSR_LINK_STS_RX_ONE_ID_MASK));

So I guess there is some handshake when Hyperlink link up, and it may involve core also.

Would you please share me some doucment or Chat to show the handshake flow of the Hyperlink?

Is it possible that Individual Power on/off one DSP without affect the second DSP?

Thanks.

  • Hi,

    See the following guide:
    software-dl.ti.com/.../Device_Drivers.html

    Especially 6.18.4. Debug FAQ. You probably get uncorrectable ECC error when the link goes down. See Section 2.9 Reset Considerations from the user guide:
    www.ti.com/.../sprugw8c.pdf

    Best Regards,
    Yordan

     


     Please make sure you read the forum guidelines first.

  • In reply to Yordan Kovachev:

    Hi, Yordan,

    Thanks for your reply.

    But I think the two documents did not answer my question clearly.

    Anyway, Actually I am concern that what's the requirement to link up the Hyperlink by Asynchronous-reboot two DSP.

    What's max. time limit between Asynchronous CFG Hyperlink?

    Why I ask this is because:

    I have tried following cases:

    1. When I reboot two DSP with 2 CMD(ms order between them), the hyperlink will link up.

    2. When I reboot DSP1 then wait for ~10s reboot DSP2, DSP1 link status(0x21400058) will be correct: 0xFDF0DFB, but DSP2 link status will be 0xCCFBDFB(Tx 0 lane active, Tx PLS not link with remote )

    Thanks.

  • Guru 50310 points

    In reply to LI XIANG:

    Hi,

    We will try to reproduce the issue by power cycle two C6678 EVMs at different time (~10 seconds) gap and will update you.

    Regards, Eric
  • Guru 50310 points

    In reply to lding:

    Hi,

    Can you explain your link rate? Is 10G or 6.25G? And use 4 lanes? I interpret "reboot" as power cycle then reload the Hyperlink program and run.

    Before you do a DSP1 reboot, is there Hyperlink established between DSP 1 and DSP 2 (0xFDF0BDF0 in offset 0x58) already? Then after DSP1 reboot, will the link recover ? After 10 seconds, you reboot DSP2, you saw the link can't be established?

    I'd like if you can provide the steps and observations of local Hyperlink registers dump like below for both sides (CCS memory dump):
    21400000: 4e902101 00006000 04400005 80000000 .!.N.`....@.....
    21400010: 00000000 00000000 00000000 00000c0a ................
    21400020: 00000000 00000000 00000000 00000000 ................
    21400030: 00000000 00000000 00000000 00000000 ................
    21400040: 0002b981 07070004 04000400 00000000 ................
    21400050: 00000000 00000000 fdf0bdf0 00200320 ............ . .
    21400060: 00000000 00000000 00000000 00000000 ................
    21400070: ffff0000 00000000 00000000 00000000

    I am interested in offset 0x4, 0x8, 0x44, 0x4c and 0x58.

    Regards, Eric
  • Guru 50310 points

    In reply to lding:

    Hi,

    We realized we need time to get the HW setup to see if the issue on TI EVM, it is not quick. Sorry for this! We need debug/analysis based on the results on your platform.

    I also wonder a case:
    Both DSP1 and DSP2 powered off as the initial condition. Then DSP1 power on, load Hyperlink and run. Wait for 10 seconds, power DSP2 for the same. Do you see the problem?

    Regards, Eric
  • In reply to lding:

    Hi Eric,

    Thanks for your help.

    It's found that once DSP1 CFG Hyperlink, if reboot DSP2, the link will broken.

    I have find the way to re-cover the link be set register (Control Register, base address+0x04).

    Do following to both DSP after two DSP power up:

    1. Set Control register bit 0 (reset)

    2. Release Control register Bit0.

    3. Clear ECC Error counter register(+0x4c)

    Hyperlink will link up and work.

    Thanks again.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.