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  • TI Thinks Resolved

RTOS/AM3359: Problem using UART4 on ICEV2 with PRU-ICSS pinmux

Prodigy 180 points

Replies: 22

Views: 715

Part Number: AM3359

Tool/software: TI-RTOS

I have a project that is built off of the NIMU_ICSS Example Project using the PRU as a dual MAC. The PRU functionality works well and is using UART3 for debug terminal. 

I am attempting to simply enable UART4 which is pinned out to header J3 on the development board. If I call the initialization code below I do not see any output on the UART Tx line. 

UART_Handle handle;
UART_Params params;

UART_Params_init(&params);
params.baudRate = 115200;
params.writeDataMode = UART_DATA_BINARY;
params.readDataMode = UART_DATA_BINARY;
params.readReturnMode = UART_RETURN_FULL;
params.readEcho = UART_ECHO_ON;
handle = UART_open(4, &params);
if (!handle) {
System_printf("UART did not open");
}

// new UART should be open, so lets send some data to it
const unsigned char testStr[] = "Test: Hello World!\n";

int32_t retVal = UART_write(handle, testStr, sizeof(testStr));
UART_printf("new UART printed %d characters\n", retVal);

In main I am calling the following Board_init cfg:


Board_initCfg cfg = BOARD_INIT_PLL| BOARD_INIT_MODULE_CLOCK | BOARD_INIT_DDR | BOARD_INIT_ICSS_PINMUX | BOARD_INIT_UART_STDIO | BOARD_INIT_ICSS_ETH_PHY;
ret = Board_init(cfg);
if (ret != BOARD_SOK)
{
UART_printf("main: Board_init returned error code: %d\n", ret);
return -2;
}

If I examine the pinmux file, iceV2AM335x_pinmux.c, I see that UART4 should be being configured:

/* UART */
status = PINMUXModuleConfig(CHIPDB_MOD_ID_UART, 1U, NULL);
if(S_PASS == status)
{
status = PINMUXModuleConfig(CHIPDB_MOD_ID_UART, 3U, NULL);
}
if(S_PASS == status)
{
status = PINMUXModuleConfig(CHIPDB_MOD_ID_UART, 4U, NULL);
}

So... what is the obvious thing I am missing? 

  • In reply to Nicholas Begley:

    Nicholas,

    Can you confirm that you rebuilt the board library after applying the pinmux changes (confirm by checking the build date). You can read the mux mode in the PAD Control register in Control module to confirm that the changes you made in the TI pinmux tool are being applied correctly. If you step through the board library code then you should be able to see the settings that you modified are being applied and check to confirm the UART clocks are enabled.

    If you are applying the pinmux settings on a custom board similar to ICEAM335x can you indicate how you have handled the personality EEPROM board detect mechanism.

    Regards,
    Rahul

    --------------------------------------------------------------------------------------------------------------------------------------
    Please click the
    This resolved my issue button on this post if the responses on this E2E thread answers your question.
    --------------------------------------------------------------------------------------------------------------------------------------

     

  • In reply to Rahul Prabhu:

    Rahul,

    I have finally worked through the confusion regarding pin configuration and successfully updated my pinmux configuration. A critical issue was that the icev2am335x.pinmux file found in the pdk would not generate the same source and header file as the iceV2AM335x_pinmux.c that comes with the installation as I (naively) assumed. In other words, modifying the pinmux through the Ti PinMux tool worked, but my application hard faulted at start-up because the PRU pins were not enabled! After modifying the generated files to include all of the pins I needed for my application, I was able to send on UART4 through the header. But....

    The UART TX is garbled and does not match my sent data string. I have verified the baud rate is as programmed. I am following the directions for initialization and configuration outlined here: processors.wiki.ti.com/.../Processor_SDK_RTOS_UART

    Do I need to do anything with the DMA configuration for having two UARTS running? I assume they are set for separate DMA channels.

    Let me know if you have any insight.

    N
  • In reply to Nicholas Begley:

    Can you re-run the pinmux script as well as the clock tree script and post the corresponding rd1 files? Here are links to the CCS scripts:

    git.ti.com/.../am335x-padconf.dss
    git.ti.com/.../am335x-ctt.dss

    ---------------------------------------------------------------------------------------------------------
    http://processors.wiki.ti.com/index.php/User:BradGriffis
    --------------------------------------------------------------------------------------------------------- 

  • In reply to Brad Griffis:

    Here is the data from both rdi files. 

    From what I see in those files the UART4 pinmux is correctly configured and the CM_PER_UART4_CLKCTRL is enabled. 

    Let me know if you see anything else or have any other suggestions. 

    am335x-ctt_2019-05-08_225533.rd1:

    DeviceName AM335x_SR2.x_SR1.0
    0x44e00000 0x02004502
    0x44e00004 0x0000000a
    0x44e00008 0x00000102
    0x44e0000c 0x0000005e
    0x44e00010 0x00070000
    0x44e00014 0x00000002
    0x44e00018 0x00070000
    0x44e0001c 0x00030000
    0x44e00020 0x00070000
    0x44e00024 0x00000002
    0x44e00028 0x00000002
    0x44e0002c 0x00000002
    0x44e00030 0x00000002
    0x44e00034 0x00030000
    0x44e00038 0x00030000
    0x44e0003c 0x00000002
    0x44e00040 0x00030000
    0x44e00044 0x00030000
    0x44e00048 0x00030000
    0x44e0004c 0x00000002
    0x44e00050 0x00000002
    0x44e00054 0x00030000
    0x44e00058 0x00030000
    0x44e00060 0x00000002
    0x44e00064 0x00000002
    0x44e00068 0x00030000
    0x44e0006c 0x00000002
    0x44e00070 0x00030000
    0x44e00074 0x00000002
    0x44e00078 0x00000002
    0x44e0007c 0x00030000
    0x44e00080 0x00000002
    0x44e00084 0x00030000
    0x44e00088 0x00030000
    0x44e0008c 0x00030000
    0x44e00090 0x00030000
    0x44e00094 0x00030000
    0x44e00098 0x00030000
    0x44e0009c 0x00030000
    0x44e000a0 0x00030000
    0x44e000a4 0x00030000
    0x44e000a8 0x00030000
    0x44e000ac 0x00000002
    0x44e000b0 0x00000002
    0x44e000b4 0x00000002
    0x44e000b8 0x00030000
    0x44e000bc 0x00000002
    0x44e000c0 0x00030000
    0x44e000c4 0x00030000
    0x44e000c8 0x00030000
    0x44e000cc 0x00030000
    0x44e000d0 0x00000002
    0x44e000d4 0x00030000
    0x44e000d8 0x00030000
    0x44e000dc 0x00000002
    0x44e000e0 0x00000002
    0x44e000e4 0x00040002
    0x44e000e8 0x00000002
    0x44e000ec 0x00030000
    0x44e000f0 0x00030000
    0x44e000f4 0x00030000
    0x44e000f8 0x00030000
    0x44e000fc 0x00000002
    0x44e00100 0x00000002
    0x44e00104 0x00030000
    0x44e0010c 0x00030000
    0x44e00110 0x00030000
    0x44e0011c 0x0000007a
    0x44e00120 0x00000002
    0x44e00124 0x00070000
    0x44e00128 0x00030000
    0x44e0012c 0x00000012
    0x44e00130 0x00040002
    0x44e00134 0x00030000
    0x44e00138 0x00030000
    0x44e0013c 0x00030000
    0x44e00140 0x00000072
    0x44e00144 0x00000012
    0x44e00148 0x00000002
    0x44e0014c 0x00000002
    0x44e00150 0x00000012
    0x44e00400 0x00001e16
    0x44e00404 0x00000002
    0x44e00408 0x00000002
    0x44e0040c 0x00000002
    0x44e00410 0x00000002
    0x44e00414 0x52580002
    0x44e00418 0x0000001e
    0x44e0041c 0x00000000
    0x44e00420 0x00000001
    0x44e00424 0x00000000
    0x44e00428 0x00000000
    0x44e0042c 0x00001900
    0x44e00430 0x00000000
    0x44e00434 0x00000001
    0x44e00438 0x00000000
    0x44e0043c 0x00000000
    0x44e00440 0x00003202
    0x44e00444 0x00000000
    0x44e00448 0x00000001
    0x44e0044c 0x00000000
    0x44e00450 0x00000000
    0x44e00454 0x00000200
    0x44e00458 0x00000000
    0x44e0045c 0x00000001
    0x44e00460 0x00000000
    0x44e00464 0x00000000
    0x44e00468 0x00007d02
    0x44e0046c 0x00000000
    0x44e00470 0x00000001
    0x44e00474 0x00000000
    0x44e00478 0x00000000
    0x44e0047c 0x00000000
    0x44e00480 0x0000022a
    0x44e00484 0x00000228
    0x44e00488 0x00000007
    0x44e0048c 0x00000007
    0x44e00490 0x00000007
    0x44e00494 0x00000007
    0x44e00498 0x00000007
    0x44e0049c 0x04019009
    0x44e004a0 0x00000201
    0x44e004a4 0x00000301
    0x44e004a8 0x00000201
    0x44e004ac 0x00000305
    0x44e004b0 0x00040002
    0x44e004b4 0x00000002
    0x44e004b8 0x00000002
    0x44e004bc 0x00030000
    0x44e004c0 0x00030000
    0x44e004c4 0x00030000
    0x44e004c8 0x00030000
    0x44e004cc 0x00000006
    0x44e004d0 0x00000002
    0x44e004d4 0x00000002
    0x44e004d8 0x00000004
    0x44e00504 0x00000001
    0x44e00508 0x00000002
    0x44e0050c 0x00000000
    0x44e00510 0x00000001
    0x44e00514 0x00000004
    0x44e00518 0x00000001
    0x44e0051c 0x00000000
    0x44e00520 0x00000000
    0x44e00528 0x00000000
    0x44e0052c 0x00000000
    0x44e00530 0x00000000
    0x44e00534 0x00000000
    0x44e00538 0x00000000
    0x44e0053c 0x00000000
    0x44e00600 0x00000006
    0x44e00604 0x00000002
    0x44e00700 0x00000000
    0x44e00800 0x00000002
    0x44e00804 0x00000302
    0x44e00900 0x00000002
    0x44e00904 0x00070000
    0x44e00908 0x00070000
    0x44e0090c 0x00000002
    0x44e00910 0x00030000
    0x44e00914 0x00030000
    0x44e00a00 0x00000002
    0x44e00a20 0x00030000
    0x44e00b00 0x00000000
    0x44e00b04 0x00000500
    0x44e00b08 0x00000000
    0x44e00b0c 0x00000100
    0x44e00b10 0x00000000
    0x44e00c00 0x00000001
    0x44e00c04 0x00000000
    0x44e00c08 0x01e60007
    0x44e00c0c 0xee0000eb
    0x44e00d00 0x00000008
    0x44e00d04 0x00000008
    0x44e00d08 0x00000000
    0x44e00d0c 0x00000000
    0x44e00e00 0x01ff0007
    0x44e00e04 0x000003f7
    0x44e00e08 0x00000000
    0x44e00f00 0x00000000
    0x44e00f04 0x00001006
    0x44e00f08 0x00000221
    0x44e00f0c 0x78000017
    0x44e00f10 0x00000003
    0x44e00f14 0x00000000
    0x44e00f18 0x00000003
    0x44e00f1c 0x00000000
    0x44e01000 0x00000004
    0x44e01004 0x00000000
    0x44e01100 0x00060044
    0x44e01104 0x00000001
    0x44e01110 0x00000037
    0x44e01114 0x00000000
    0x44e01200 0x00000000
    0x44e01204 0x00000007
    0x44e10040 0x00490318

    ----

    am335x-padconf_2019-05-08_224455.rd1

    PadConf AM335x
    0x44e10800 0x00000027
    0x44e10804 0x00000027
    0x44e10808 0x00000027
    0x44e1080c 0x00000027
    0x44e10810 0x00000027
    0x44e10814 0x00000027
    0x44e10818 0x00000027
    0x44e1081c 0x00000027
    0x44e10820 0x00000027
    0x44e10824 0x00000027
    0x44e10828 0x00000027
    0x44e1082c 0x00000027
    0x44e10830 0x00000027
    0x44e10834 0x00000027
    0x44e10838 0x00000027
    0x44e1083c 0x00000027
    0x44e10840 0x0000002d
    0x44e10844 0x00000005
    0x44e10848 0x00000005
    0x44e1084c 0x00000005
    0x44e10850 0x00000005
    0x44e10854 0x0000002d
    0x44e10858 0x0000002d
    0x44e1085c 0x0000002d
    0x44e10860 0x0000002d
    0x44e10864 0x0000002d
    0x44e10868 0x0000002d
    0x44e1086c 0x0000002d
    0x44e10870 0x00000025
    0x44e10874 0x00000005
    0x44e10878 0x0000002d
    0x44e1087c 0x00000000
    0x44e10880 0x0000000f
    0x44e10884 0x00000004
    0x44e10888 0x00000035
    0x44e1088c 0x00000015
    0x44e10890 0x00000000
    0x44e10894 0x00000000
    0x44e10898 0x00000000
    0x44e1089c 0x00000007
    0x44e108a0 0x0000002a
    0x44e108a4 0x00000002
    0x44e108a8 0x00000002
    0x44e108ac 0x00000002
    0x44e108b0 0x00000002
    0x44e108b4 0x00000002
    0x44e108b8 0x0000002f
    0x44e108bc 0x0000002f
    0x44e108c0 0x0000002d
    0x44e108c4 0x0000002d
    0x44e108c8 0x0000002d
    0x44e108cc 0x0000002d
    0x44e108d0 0x0000002d
    0x44e108d4 0x0000002d
    0x44e108d8 0x0000002d
    0x44e108dc 0x0000002d
    0x44e108e0 0x00000027
    0x44e108e4 0x00000027
    0x44e108e8 0x0000002a
    0x44e108ec 0x0000002a
    0x44e108f0 0x00000030
    0x44e108f4 0x00000030
    0x44e108f8 0x00000030
    0x44e108fc 0x00000030
    0x44e10900 0x00000030
    0x44e10904 0x00000030
    0x44e10908 0x00000027
    0x44e1090c 0x00000027
    0x44e10910 0x00000027
    0x44e10914 0x00000027
    0x44e10918 0x00000007
    0x44e1091c 0x00000007
    0x44e10920 0x00000007
    0x44e10924 0x00000027
    0x44e10928 0x00000027
    0x44e1092c 0x00000007
    0x44e10930 0x00000007
    0x44e10934 0x00000031
    0x44e10938 0x00000011
    0x44e1093c 0x00000027
    0x44e10940 0x00000027
    0x44e10944 0x00000027
    0x44e10948 0x00000037
    0x44e1094c 0x00000037
    0x44e10950 0x00000028
    0x44e10954 0x00000028
    0x44e10958 0x00000000
    0x44e1095c 0x00000000
    0x44e10960 0x00000028
    0x44e10964 0x00000017
    0x44e10968 0x00000021
    0x44e1096c 0x00000009
    0x44e10970 0x00000012
    0x44e10974 0x00000032
    0x44e10978 0x00000037
    0x44e1097c 0x00000037
    0x44e10980 0x0000002d
    0x44e10984 0x00000005
    0x44e10988 0x00000028
    0x44e1098c 0x00000028
    0x44e10990 0x0000002b
    0x44e10994 0x0000002b
    0x44e10998 0x00000033
    0x44e1099c 0x00000033
    0x44e109a0 0x00000017
    0x44e109a4 0x00000005
    0x44e109a8 0x00000027
    0x44e109ac 0x0000000f
    0x44e109b0 0x00000007
    0x44e109b4 0x00000007
    0x44e109b8 0x00000030
    0x44e109c0 0x00000030
    0x44e109d0 0x00000030
    0x44e109d4 0x00000030
    0x44e109d8 0x00000030
    0x44e109dc 0x00000030
    0x44e109e0 0x00000020
    0x44e109e4 0x00000030
    0x44e109e8 0x00000030
    0x44e109f8 0x00000030
    0x44e109fc 0x00000028
    0x44e10a00 0x00000028
    0x44e10a1c 0x00000017
    0x44e10a34 0x00000020

  • In reply to Nicholas Begley:

    Would you mind just zipping those two files and attaching them? It is easier for me to work with.

    ---------------------------------------------------------------------------------------------------------
    http://processors.wiki.ti.com/index.php/User:BradGriffis
    --------------------------------------------------------------------------------------------------------- 

  • In reply to Brad Griffis:

    Attached are the two files zipped.

    ICEV2AM335x_UART4.zip

  • In reply to Nicholas Begley:

    You mentioned you were using the signals on header J3 of the ICEv2 board. So looking at your pinmuxing, I can see you have the following mapped:

    * (J3, Pin 7) AM335x ZCZ Pin E18 <-- uart4_rxd
    * (J3, Pin 8), AM335x ZCZ Pin E17 --> uart4_txd

    So that mapping looks correct. I also verified that no other pins are being configured as UART4.

    Looking at your clocking, I see that UART4 is properly enabled, and that its input clocks are the expected values (48 MHz functional clock, 100 MHz interface clock).

    That leaves the actual UART configuration as the likely issue. My first suspicion would be the baud rate itself. I recommend opening a CCS memory window to address 0x481A_8000 (UART 4 base address) and taking a screenshot. It's difficult to interpret these registers because many of the addresses are used for multiple different registers, i.e. depending on various mode bits as well as whether you are reading or writing the address.

    Did you say that UART3 was working fine? You may want to get a similar screenshot there for comparison to see if anything is clearly different.

    ---------------------------------------------------------------------------------------------------------
    http://processors.wiki.ti.com/index.php/User:BradGriffis
    --------------------------------------------------------------------------------------------------------- 

  • In reply to Brad Griffis:

    Thank you for this reply. I learned something, but the problem still remains. 

    I did also learn that in order to examine the Configuration Mode version of the register, I had to modify the UART_LCR[7] bit. After doing so I was able to take the following screenshots:

    See attached pictures. The Baud rate fields are configured identically, but the UARTn_RXFLL, UARTn_SFREGL and UARTn_RXFLH, UARTn_SFREGH registers do not match. This implies that the frame length setting is incorrect? All other fields are identical. Let me know if there is something else that I should investigate or try. 

    Thank you. 

  • In reply to Nicholas Begley:

    Any additional input on this? I am stranded now without this UART functional which is critical to the project. I imagine my previous post helped clarify something?
  • In reply to Nicholas Begley:

    Nicholas,

    Can you please confirm that you are using buadrate of 115.2 kbps or some other standard baud rate? Can you confirm BRad`s question on whether you have UART3 functional with the right baud rate ? How many UARTs are you enabling and is UART4 the default debug UART instance that is setup using board for STDIO operations.

    I noticed in your earlier code you are setting the driver to read and Write data in binary format and then you try to send character string out. Shouldn`t the driver DataMode be set to UART_DATA_TEXT. Also, please indicate if you have modified interrupt setup, clocking or modes of operation in UART_soc.c.

    Regards,
    Rahul

    --------------------------------------------------------------------------------------------------------------------------------------
    Please click the
    This resolved my issue button on this post if the responses on this E2E thread answers your question.
    --------------------------------------------------------------------------------------------------------------------------------------

     

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