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AM5718: EMIF tools question

Intellectual 465 points

Replies: 45

Views: 1633

Part Number: AM5718

Hi ,

We developed AM5718 based SOM, and we using IS43TR16256A-125KBL-TR  2X RAM chip

I configured DDR3 memory using this EMIF tool in that spread sheet unable to change "Detail 1" value after filling remaining cell  I am getting the following output.

/* =========================================================================		
 *   Copyright (C) 2017 Texas Instruments Incorporated		
 *		
 *   All rights reserved. Property of Texas Instruments Incorporated.		
 *   Restricted rights to use, duplicate or disclose this code are		
 *   granted through contract.		
 *		
 *   The program may not be used without the written permission		
 *   of Texas Instruments Incorporated or against the terms and conditions		
 *   stipulated in the agreement under which this program has been		
 *   supplied.		
 * ========================================================================= */		
		
/*		
 *  AM571x_DDR3L_666MHz_TI_AM574x_EVM_config.c		
 *     Created on: 05/03/2019		
 *     Created with: EMIF_RegisterConfig_v2.0.2		
 */		
		
#include "emif4d5_wrapper.h"		
		
const struct dpll_params AM571x_DDR3L_666MHz_TI_AM574x_EVM_pll_params = {		
    .m = 333,		
    .n = 4,		
    .m2 = 2,		
    .m4_h11 = 8		
};		
		
const struct ctrl_ioregs AM571x_DDR3L_666MHz_TI_AM574x_EVM_ctrl_ioregs = {		
    .ctrl_ddr3ch = 0x60606060,		
    .ctrl_ddrch = 0x40404040,		
    .ctrl_ddrio_0 = 0x00094A40,		
    .ctrl_ddrio_1 = 0x00000000,		
    .ctrl_emif_sdram_config_ext = 0x0000C123		
};		
		
const struct dmm_lisa_map_regs AM571x_DDR3L_666MHz_TI_AM574x_EVM_dmm_regs = {		
    .dmm_lisa_map_0 = 0x00000000,		
    .dmm_lisa_map_1 = 0x00000000,		
    .dmm_lisa_map_2 = 0x80700100,		
    .dmm_lisa_map_3 = 0xFF020100,		
    .is_ma_present = 0x1		
};		
		
const struct emif_regs AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif_regs = {		
    .sdram_config_init = 0x61862BB2,		
    .sdram_config = 0x61862BB2,		
    .sdram_config2 = 0x00000000,		
    .ref_ctrl = 0x0000514D,		
    .ref_ctrl_final = 0x0000144A,		
    .sdram_tim1 = 0xD3337834,		
    .sdram_tim2 = 0x30B37FE3,		
    .sdram_tim3 = 0x407F8AD8,		
    .read_idle_ctrl = 0x00050000,		
    .zq_config = 0x5007190B,		
    .temp_alert_config = 0x00000000,		
    .emif_rd_wr_lvl_rmp_ctl = 0x80000000,		
    .emif_rd_wr_lvl_ctl = 0x00000000,		
    .emif_ddr_phy_ctlr_1_init = 0x0824400E,		
    .emif_ddr_phy_ctlr_1 = 0x0E24400E,		
    .emif_rd_wr_exec_thresh = 0x00000305,		
		
    .emif_ecc_ctrl_reg = 0x00000000,		
    .emif_ecc_address_range_1 = 0x3FFF0000,		
    .emif_ecc_address_range_2 = 0x00000000,		
		
};		
		
/*		
 * DLL Ratio Values are an estimate based on trace lengths. Either 		
 * software leveling or hardware leveling should be performed to		
 * determine final DLL values.		
 */		
const unsigned int AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif1_ext_phy_regs [] = {		
    ,	// EMIF1_EXT_PHY_CTRL_1	
    ,	// EMIF1_EXT_PHY_CTRL_2	
    ,	// EMIF1_EXT_PHY_CTRL_3	
    ,	// EMIF1_EXT_PHY_CTRL_4	
    ,	// EMIF1_EXT_PHY_CTRL_5	
    ,	// EMIF1_EXT_PHY_CTRL_6	
    ,	// EMIF1_EXT_PHY_CTRL_7	
    ,	// EMIF1_EXT_PHY_CTRL_8	
    ,	// EMIF1_EXT_PHY_CTRL_9	
    ,	// EMIF1_EXT_PHY_CTRL_10	
    ,	// EMIF1_EXT_PHY_CTRL_11	
    ,	// EMIF1_EXT_PHY_CTRL_12	
    ,	// EMIF1_EXT_PHY_CTRL_13	
    ,	// EMIF1_EXT_PHY_CTRL_14	
    ,	// EMIF1_EXT_PHY_CTRL_15	
    ,	// EMIF1_EXT_PHY_CTRL_16	
    ,	// EMIF1_EXT_PHY_CTRL_17	
    ,	// EMIF1_EXT_PHY_CTRL_18	
    ,	// EMIF1_EXT_PHY_CTRL_19	
    ,	// EMIF1_EXT_PHY_CTRL_20	
    ,	// EMIF1_EXT_PHY_CTRL_21	
    ,	// EMIF1_EXT_PHY_CTRL_22	
    ,	// EMIF1_EXT_PHY_CTRL_23	
    ,	// EMIF1_EXT_PHY_CTRL_24	
    ,	// EMIF1_EXT_PHY_CTRL_25	
    ,	// EMIF1_EXT_PHY_CTRL_26	
    ,	// EMIF1_EXT_PHY_CTRL_27	
    ,	// EMIF1_EXT_PHY_CTRL_28	
    ,	// EMIF1_EXT_PHY_CTRL_29	
    ,	// EMIF1_EXT_PHY_CTRL_30	
    ,	// EMIF1_EXT_PHY_CTRL_31	
    ,	// EMIF1_EXT_PHY_CTRL_32	
    ,	// EMIF1_EXT_PHY_CTRL_33	
    ,	// EMIF1_EXT_PHY_CTRL_34	
    ,	// EMIF1_EXT_PHY_CTRL_35	
    	// EMIF1_EXT_PHY_CTRL_36	
};		
		
struct emif_cfg AM571x_DDR3L_666MHz_TI_AM574x_EVM = {		
    .platform = "AM571x_DDR3L_666MHz_TI_AM574x_EVM",		
    .EMIF2_DEFINED = 0,		
    .pll_regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_pll_params,		
    .ctrl_regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_ctrl_ioregs,		
    .dmm_regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_dmm_regs,		
    .regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif_regs,		
    .phy_regs1 = AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif1_ext_phy_regs,		
		
};		

Question is where can i apply all this values in source code? 

 

Regards,

Ravi

  • In reply to ravi rk:

    Hi Ravi, your u-boot output shows it is using am571x_emif1_ddr3_666mhz_emif_regs structure.  Is this the structure you made changes to based on the EMIF tool spreadsheet?  The latest spreadsheet shows a DDR Memory Frequency of 532MHz, yet u-boot is using a 666MHz configuration.  This needs to be resolved

    Also, you are using 2 x16 256MB DDR3 (total of 1GB) on EMIF1.  But you said that you didn't connect A14, so you really only have 512MB connected.

    Because of this, i think your lisa_map_reg structure looks like this:

    .dmm_lisa_map_0 = 0x00000000,      
        .dmm_lisa_map_1 = 0x00000000,      
        .dmm_lisa_map_2 = 0x00000000,      
        .dmm_lisa_map_3 = 0x80500100,      
        .is_ma_present = 0x1  

    In the EMIF tool spreadsheet, line 16 Density shouldbe 4Gb to represent the density of one DDR device.  This will change some of the timing parameters in the configuration.

    Also, continue to send the latest output from the dss scripts and the latest spreadsheet after you make change, so we can ensure the changes made were picked up in u-boot correctly.

    Regards,

    James

  • In reply to JJD:

    Hi James,

    Thanks for your detailed replay. Please find my replay prefixed with "Ravi_17May2019=>"

     

    Hi Ravi, your u-boot output shows it is using am571x_emif1_ddr3_666mhz_emif_regs structure.  Is this the structure you made changes to based on the EMIF tool spreadsheet?  The latest spreadsheet shows a DDR Memory Frequency of 532MHz, yet u-boot is using a 666MHz configuration.  This needs to be resolved

    Ravi_17May2019=> Yes, I have used "am571x_emif1_ddr3_666mhz_emif_regs" named structure for 532MHz configuration changes.

     

    Also, you are using 2 x16 256MB DDR3 (total of 1GB) on EMIF1.  But you said that you didn't connect A14, so you really only have 512MB connected.

    Ravi_17May2019=> Yes, We used  "2 x16 256MB DDR3 (total of 1GB)" on EMIF1. I need to change the EMIF tool configuration for 512MB because of A14 not connected to DDR?

     

    In the EMIF tool spreadsheet, line 16 Density shouldbe 4Gb to represent the density of one DDR device.  This will change some of the timing parameters in the configuration.

    Also, continue to send the latest output from the dss scripts and the latest spreadsheet after you make change, so we can ensure the changes made were picked up in u-boot correctly.

    Ravi_17May2019=> Please find the modified (Density is 4Gb) EMIF configuration spread sheet & dss file for your reference.

    File Name: 

    AM5718_DDR_CONFIG_TEST_17May19.zip

    Regards,

    Ravi

  • In reply to ravi rk:

    Hi Ravi,

    Could you please share your board.c file with us?

    Regards,
    Krunal
  • In reply to Krunal Bhargav34:

    HI Krunal,

    I have attached the board.c for your reference. 

    File Name: 5807.board.c

    Regards,
    Ravi

  • In reply to ravi rk:

    Hi Krunal,

    Pease let us know if you have any updates. Which help us to resolve this issue.

    Regards,
    Ravi
  • In reply to SURESH p:

    Ravi, i still see discrepancies in a lot of the EXT_PHY_CONTROL registers between the spreadsheet and the DSS script. Below is just an example:


    EMIF_EXT_PHY_CONTROL_2 = 0x07000071
    EMIF_EXT_PHY_CONTROL_3 = 0x07000086
    EMIF_EXT_PHY_CONTROL_4 = 0x07000088
    EMIF_EXT_PHY_CONTROL_5 = 0x07000090
    EMIF_EXT_PHY_CONTROL_6 = 0x07000700

    0x006B0094, // EMIF1_EXT_PHY_CTRL_2
    0x006B008F, // EMIF1_EXT_PHY_CTRL_3
    0x006B0088, // EMIF1_EXT_PHY_CTRL_4
    0x006B0082, // EMIF1_EXT_PHY_CTRL_5
    0x006B006B, // EMIF1_EXT_PHY_CTRL_6

    Please ensure all of these values (check all 36 register values) get copied over into your source code.

    Regards,
    James
  • In reply to JJD:

    Hi James,

    Those values changed frequently, we checked on both AM5718-IDK as well as our custom board

    Pleas find the attachment in that you can find same value in both EMIF tool spreadsheet and board.c 

    Regards,

    Ravi

    AM5718_DDR_CONFIG_TEST_22May2019.zip

  • In reply to JJD:

    Hi James,

    Those values changed frequently, we checked on both AM5718-IDK as well as our custom board

    Pleas find the attachment in that you can find same value in both EMIF tool spreadsheet and board.c 

    We are  looking forward for your replay.

    Regards,

    Ravi

    8741.AM5718_DDR_CONFIG_TEST_22May2019.zip

  • In reply to ravi rk:

    Hi James,

    We try to do debugging  uboot from CCS,u-boot-spl loaded and executed successfully.

    Then we try to load u-boot, for this we get following error

    CortexA15_0: File Loader: Verification failed: Values at address 0x80800000 do not match Please verify target memory and memory map.

    CortexA15_0: GEL: File: /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/board-support/u-boot-2018.01+gitAUTOINC+313dcd69c2-g825ac6e1ac/u-boot: a data verification error occurred, file load failed.

    CortexA15_0: Unable to terminate memory download: NULL buffer pointer at 0x3aa4 (Emulation package 8.1.0.00007)

    We updated "AM571x_ddr_config.gel"  with respect  to our EMIF spreadsheet registers value but in "LISA_MAP" we didn't change because it look vise versa.

    I attached our EMIF spreadsheet and gel file for your reference

    Regards,

    Ravi

    AM5718_DDR_CONFG_GEL_FILE_22May19.zip

  • In reply to ravi rk:

    Hi Ravi,

    Those values changed frequently, we checked on both AM5718-IDK as well as our custom board

    Could you please explain what you mean by values frequently changing?

    Regards,

    Krunal 

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