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(66AK2H14):About equalizer parameter tuning of SerDes Hi Expert

Other Parts Discussed in Thread: 66AK2H14

Hi Expert

www.ti.com/.../spruho3a.pdf
KeyStone II Architecture
Serializer/Deserializer (SerDes)
User's Guide

14.2.3 TX Driver Equalization (Page 52)


I'd like to tune the equalizer referring to the above user's guide (Page 52),
but I do not know which item corresponds to the parameter table I understand here.

Could you tell me which item the attached parameter table corresponds to?
(Can I have if there is a correspondence table?)

Option Attribute Setting
SWING Output swing   1-10
Cm1 EQ pre cursor tap 0-7
C1 EQ post cursor tap 0-15
control Input ATT Controls 0-15
zero control   0-2
BOOST CTLE Controls 0-15
Gain 0-3
Super Boost Enable   0-1
EDGE Tap
1/2/3/4/5
0-127/63/
63/63/63
Center Tap
1/2/3/4/5
DFE Controls 0-127/63/
63/63/63
Center DFE Enable 0/1


Best Regards,

Honma

  • Hi,

    I've notified the team. They will post their feedback directly here.

    Best Regards,
    Yordan
  • Hi,

    I don't know where you got this table, it is not inside the Serdes UG. This table listed the parameters and their range. We have Serdes diagnostics software on Keystone II device for this, it has C1, C2, CM you can tune. Please check the Processor SDK RTOS for K2H/K2E ... device, under packages\ti\diag\serdes_diag .

    Regards, Eric
  • Hi,Eric

    Thank you for reply.

    The presented table is a parameter list of the 66AK2H14 IBIS model (66AK2H14 IBIS-AMI),
    but it does not match the parameters of the user's guide. How do I reflect the simulation result?

    Best Regards
    Honma

  • Hi, Eric

    These questions are necessary because there is a need to adjust the PRBS signal with the FPGA side that is the opposite side.

    Best Regards,
    Honma

  • Hi,

    Can you clarify what software package you are going to use to adjust the PRBS signal and for what interface? Is it IBIS AMI mode? Or if you can use the Serdes diagnostics in the Processor SDK RTOS? If is for the former, I think it need to be discussed with FAE, not in the E2E.

    Regards, Eric

  • Hi Eric

    Now Using Software package
    - pdk_k2hk_4_0_7

    Now Using SerDes Interface
    - SGMII
    - SRIO
    - 10GbE

    We are using Serdes diagnostics on RTOS of processor SDK.
    On the DSP board under development, the PRBS internal loopback test
    is passing normally, but only the FPGA (RX) side at the opposite
    side has been error counted.
    Both TX and RX on the DSP side have normally terminated the PRBS.

    Best Regards,
    Honma