RTOS/66AK2H14: how to use both the hyperlink ports at once

We're looking into this.

Hi Pavel,
Thanks for your suggestion .
My question was how to make both hyperlinks[PORT0 and PORT 1] works at a time.
As I said we have 3 66ak2h14 processors ,out of which 1 is configured as Centralized Processor (Called CP henceforth) and 2 Distributing Processors (Called DP henceforth). we need to send data from DP to CP through hyperlink .
DP1 and CP are connected through HYPLNK PORT0
DP2 and CP are connected through HYPLNK PORT1.
we need to send data from DP1 and DP2 to CP at a time .
So we need both the ports work at a time.

1.How to achieve this in software?
2. Whether I need to copy the required function or there is any other way to do this?

Regards,
Mahima Shanbag

Mahima,

mahima shanbag said:

My question was how to make both hyperlinks[PORT0 and PORT 1] works at a time.

mahima shanbag said:

So we need both the ports work at a time.

mahima shanbag said:

1.How to achieve this in software?

The hyplnk example that is coming with K2H PDK is using port 0 (hyperlink0) or port 1 (hyperlink1). You need to modify that example to use both ports.

pdk_k2hk_4_0_9/packages/ti/drv/hyplnk/example/common/

pdk_k2hk_4_0_9/packages/ti/drv/hyplnk/example/memoryMappedExample/

mahima shanbag said:

2. Whether I need to copy the required function

Yes, you can dump hyperlink0 (port 0) settings (like registers values, pins configuration, interrupt configuration) and apply these to hyperlink1.

mahima shanbag said:

or there is any other way to do this?

I am not aware of other way than reusing the PDK hyperlink example

Regards,
Pavel

Hi,

I was trying to modify the PDK HYPLNK example to use both ports.
I thought of creating two threads and configuring each ports.
nt main(void)
{
// , *dataBufPtr_1;
Board_initCfg boardCfg;
int threadArg = 1;
pthread_attr_t attr;
boardCfg = BOARD_INIT_PINMUX_CONFIG |
BOARD_INIT_MODULE_CLOCK |
BOARD_INIT_UART_STDIO;
Board_init(boardCfg);

pthread_attr_init(&attr);
pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_JOINABLE);
if(pthread_create(&port0_thread, &attr , (ThreadFxn)hyplnk_port0, (void *)threadArg))
{
UART_printf("Error creating thread\n");
return 1;

}
if(pthread_create(&port1_thread, &attr,(ThreadFxn) hyplnk_port1 ,(void *)threadArg))
{
UART_printf("Error creating thread\n");
return 1;
}


pthread_join(port0_thread,NULL);
pthread_join(port1_thread,NULL);
return 0;


}
But
1. one thread is created successfully but for second thread it was giving ENOMEM error.

How to solve this error?

2.I commented the second thread and tried with only one thread.
But for pthread_join I was getting below assertion:
ti.sysbios.knl.Semaphore: line 202: assertion failure: A_badContext: bad calling context. Must be called from a Task.

Please help me to solve these errors.
Regards,
Mahima Shanbag

Hi
I was trying to implement Hyperlink_PORT0 and Hyperlink_PORT1 in separate thread so that I can make both the ports works simultaneously.
But creating multiple thread didn't make any difference . only one thread was running at a time.

1.How to make both the threads work simultaneosly in 66AK2H14?

2.whether I can run Hyperlink_Port0 in one DSP core and Hyperlink_Port1 in another DSP core?if so how to do that?
Because I tested by flashing the Hyperlink_Port0 application into DSP core 0 and Hyperlink_Port1 application into DSP core 1 as
MulticoreImageGen.exe LE 55 hyplnk_app 5 hyplnk0_rprc 6 hyplnk1_rprc .
But when I change the boot mode to SPI It got stuked at
jumping to user application......

I think I missed something.

Please help me with this.

Thanks and Regards,
Mahima Shanbag

Hi,

Just wanted to let you know that Pavel is OoO, but your issue is being looked at.

Best Regards,
Yordan

Hi,

For the DP, you can use one DSP core. For the CP, you have two Hyperlink ports each connected to a DP. If you only have one DSP core in use, and use two tasks, at any given time point, only one task is running. I'm not sure your real-time data move requirement. Do you have Hyperlink data flow continuously for each port, and you can't have any delay? Or you can have port 0 moving data, some delay, switching to port 1, back and forth?

If you have determined that you must have two flows at the same time for time critical requirement. Then, you can use two DSP cores in CP, one for each Hyperlink port. Before you jump to bootloader, are you able to develop software loading via CCS/JTAG and proven working for two-core case?

Regards, Eric

Hi Eric,

I was trying to run the Hyplnk_PORT0 example in CP using Jtag in DSP core 1 with DP1(flashed Hyplnk_PORT0 application to DSP core0).

Link was up and it was about to read write but data transfer failed .

I thought this was due to ,

Hyplnk_PORT0  example  running in DP1 was flashed to  DSP core 0 and in CP it is in DSP core 1.

So I tried flashing the Hyplnk_PORT0  example to DSP core 1 of DP1 instead of DSP core 0.

MulticoreImageGen.exe LE 55 hyplnk_app 6 hyplnk1_rprc .

But when I change the boot mode it got stucked at

jumping to user application......

Now my question is

1. Whether my assumption about the data transfer failure ( due to Hyplnk_PORT0  example  running in DP1 was flashed to  DSP core 0 and in CP it was in DSP core 1.) is correct?

2. How to flash the application into DSP core 1  instead of DSP core 0?

Please help me with this.

Thanks and Regards,

Mahima Shanbag

Hi,

All the Hyperlink driver examples are tested on core 0 of the DSP. If you both use Hyperlink port 0, but one side use DSP core 0 and the other side use DSP core 1, there may be some test buffer allocate issues, you need to check code. At least you have the link coming up so the initialization of hyperlink is working. Suggesting you first use JTAG to load the code to both core 1 to debug and make sure it working then moving to a bootable media.

Regards, Eric

Hi Eric,
I tested Hyplnk_Example on core 1 of the DSP. It is working.
But when testing through JTAG at any time only one core is running.
How to run both the cores simultaneously?

Regards,
Mahima Shanbag

Hi,

You can connect multiple cores of the same SOC (here you just need two cores). Then load one program in core 0 and another program in core 1, then just run.

Regards, Eric

Hi Eric,

You can connect multiple cores of the same SOC (here you just need two cores). Then load one program in core 0 and another program in core 1, then just run.
---------------------------------------------->>>>>
this is working for all other application .
I checked by loading EEPROM example application to CORE 0 and flash_writer application to CORE 1.
both were running simultaneously.
But when I do the same for hyplnk example , like when I load the HYPLNK PORT 0 to CORE 0 and HYPLNK PORT 1 to CORE 1, only one core is running at a time.
I think there is some dependency for hyperlink as it uses MSMC .

Please help me to solve this.

Thanks and Regards,
Mahima Shanbag

Hi Eric,
I got one post about MSMC shared memory.e2e.ti.com/.../393677
In that it was like multiple cores cannot access a particular address in MSMC on the same clock cycle.
Whether this is creating problem in my case? How can I remap it to some other address for HYPLNK PORT 1 ?

Please help me to solve this issue as soon as possible.

Thanks and Regards,
Mahima Shanbag

Hi,

When you use a multicore application, it is expected that all the cores use the same program (in MSMC or DDR) and put your local data and stack in the local core (L2).

Now you are running core 0 for hyerlink port 0 and core 1 for hyperlink port 1, and you used different program. Depending how big is your code, if small, you can put there in local L2. If not, then you need to put them into shared memory, like DDR and MSMC. Can you confirm, in your applications, how do you make sure the MSMC used by core 0 is NOT overlap with MSMC used by core 1? If then are overlapping, the code loaded later will flush out the code loaded previously. If core 0 and core 1 use separate locations of MSMC, I don't think there is any issue.

Regards, Eric