Hello,
i'm looking to utilize the uPP interface as a possible high throughput option between the C6655 and an FPGA. Does the layout of the uPP interface require any specific hardware requirements during layout (i..e length matching)?
Thanks.
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Hello,
i'm looking to utilize the uPP interface as a possible high throughput option between the C6655 and an FPGA. Does the layout of the uPP interface require any specific hardware requirements during layout (i..e length matching)?
Thanks.
Hi Brent,
There isn't any special requirement for the design of the uPP:
www.ti.com/.../spruhg9.pdf
www.ti.com/.../tms320c6655.pdf
processors.wiki.ti.com/.../Introduction_to_uPP
www.ti.com/.../sprabi2c.pdf
Best Regards,
Yordan